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HD74HC175 데이터 시트보기 (PDF) - Hitachi -> Renesas Electronics

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HD74HC175
Hitachi
Hitachi -> Renesas Electronics Hitachi
HD74HC175 Datasheet PDF : 9 Pages
1 2 3 4 5 6 7 8 9
HD74HC175
Quad. D-typ Flip-Flops (with Clear)
Description
Information at the D inputs of the HD74HC175 is transferred to the Q and Q outputs on the positive going
edge of the clock pulse. Both true and compliment outputs from each flip-flop are externally available. All
four flip flops are controlled by a common clock and a common clear. Clearing is accomplished by a
negative pulse at the clear input. All four Q outputs are cleared to a logic low level and all four Q outputs
to a logic high level.
Features
High Speed Operation: tpd (Clock to Q) = 14 ns typ (CL = 50 pF)
High Output Current: Fanout of 10 LSTTL Loads
Wide Operating Voltage: VCC = 2 to 6 V
Low Input Current: 1 µA max
Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C)
Function Table
Inputs
Clear
Clock
D
L
X
X
H
H
H
L
H
L
H
Outputs
Q
Q
L
H
H
L
L
H
no change

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