HA-2425(2003) 데이터 시트보기 (PDF) - Intersil

부품명

상세내역

제조사

HA-2425
(Rev.:2003)

3.2µs Sample and Hold Amplifiers

Intersil 

Test Circuits and Waveforms

HA-2420, HA-2425

INPUT

-IN

+IN

S/H

HOLD

CONTROL CAP

GND

OUTPUT

CH

S/H CONTROL

INPUT

FIGURE 1. HOLD STEP ERROR AND DRIFT CURRENT

S/H

CONTROL

HOLD

SAMPLE

OUTPUT

VSTEP

NOTE: Set rise/fall times of S/H Control to approximately 20ns.

FIGURE 2. HOLD STEP ERROR TEST

S/H

CONTROL

OUTPUT

HOLD

SAMPLE

∆V

∆t

NOTE: Measure the slope of the output during hold, ∆V/∆t,

and compute drift current from: ID = CH ∆V/∆t.

FIGURE 3. DRIFT CURRENT TEST

SINE WAVE

INPUT

IN2

IN1

IN3

IN4

IN5

IN6

IN7

IN8

A2

A1

+5V

EN

HI-508A

MUX

OUT

A0

-IN HA-2420/2425

VO

OUT

+IN S/H

HOLD

CONTROL CAP GND

VINP-P

CH

S/H CONTROL INPUT

NOTE: Compute hold mode feedthrough attenuation from the formula:

Feedthrough Attenuation = 20log V-----O----U----T----H-----O-----L----D---

VINHOLD

Where VOUTHOLD = Peak-to-Peak value of output

sinewave during the hold mode.

FIGURE 4. HOLD MODE FEEDTHROUGH ATTENUATION

4

Share Link: