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22346UFVZ

Quad Digitally Controlled Potentiometers (XDCP™) Low Noise, Low Power I2C™ Bus, 128 Taps

Renesas Electronics 

ISL22346

Pin Descriptions

Potentiometers Pins

RHI AND RLI (i = 0, 1, 2 OR 3)

The high (RHi) and low (RLi) terminals of the ISL22346 are

equivalent to the fixed terminals of a mechanical

potentiometer. RHi and RLi are referenced to the relative

position of the wiper and not the voltage potential on the

terminals. With WRi set to 127 decimal, the wiper will be

closest to RHi, and with the WRi set to 0, the wiper is closest to

RLi.

RWI (i = 0, 1, 2 OR 3)

RWi is the wiper terminal and is equivalent to the movable

terminal of a mechanical potentiometer. The position of the

wiper within the array is determined by the WRi register.

SHDN

The SHDN pin forces the resistor to end-to-end open circuit

condition on RHi and shorts RWi to RLi. When SHDN is

returned to logic high, the previous latch settings put RWi at

the same resistance setting prior to shutdown. This pin is

logically ANDed with SHDN bit in ACR register. I2C interface is

still available in shutdown mode and all registers are

accessible. This pin must remain HIGH for normal operation.

RH

RW

RL

FIGURE 15. DCP CONNECTION IN SHUTDOWN MODE

Bus Interface Pins

SERIAL DATA INPUT/OUTPUT (SDA)

The SDA is a bidirectional serial data input/output pin for I2C

interface. It receives device address, operation code, wiper

address and data from an I2C external master device at the

rising edge of the serial clock SCL, and it shifts out data after

each falling edge of the serial clock.

SDA requires an external pull-up resistor, since it is an open

drain input/output.

SERIAL CLOCK (SCL)

This is the serial clock input of the I2C serial interface. SCL

requires an external pull-up resistor, since it is an open drain

input.

DEVICE ADDRESS (A2 - A0)

The address inputs are used to set the least significant 3 bits of

the 7-bit I2C interface slave address. A match in the slave

address serial data stream must match with the Address input

pins in order to initiate communication with the ISL22346. A

maximum of 8 ISL22346 devices may occupy the I2C serial

bus.

Principles of Operation

The ISL22346 is an integrated circuit incorporating four DCPs

with their associated registers, non-volatile memory and an I2C

serial interface providing direct communication between a host

and the potentiometers and memory. The resistor arrays are

comprised of individual resistors connected in series. At either

end of the array and between each resistor is an electronic

switch that transfers the potential at that point to the wiper.

The electronic switches on the device operate in a “make

before break” mode when the wiper changes tap positions.

When the device is powered down, the last value stored in IVRi

will be maintained in the non-volatile memory. When power is

restored, the contents of the IVRi are recalled and loaded into

the corresponding WRi to set the wipers to the initial value.

DCP Description

Each DCP is implemented with a combination of resistor

elements and CMOS switches. The physical ends of each DCP

are equivalent to the fixed terminals of a mechanical

potentiometer (RH and RL pins). The RW pin of each DCP is

connected to intermediate nodes, and is equivalent to the

wiper terminal of a mechanical potentiometer. The position of

the wiper terminal within the DCP is controlled by volatile

Wiper Register (WR). Each DCP has its own WR. When the

WR of a DCP contains all zeroes (WR[6:0]= 00h), its wiper

terminal (RW) is closest to its “Low” terminal (RL). When the

WR register of a DCP contains all ones (WR[6:0]= 7Fh), its

wiper terminal (RW) is closest to its “High” terminal (RH). As

the value of the WR increases from all zeroes (0) to all ones

(127 decimal), the wiper moves monotonically from the

position closest to RL to the closest to RH. At the same time,

the resistance between RW and RL increases monotonically,

while the resistance between RH and RW decreases

monotonically.

While the ISL22346 is being powered up, all four WRs are

reset to 40h (64 decimal), which locates RW roughly at the

center between RL and RH. After the power supply voltage

becomes large enough for reliable non-volatile memory

reading, all WRs will be reload with the value stored in

corresponding non-volatile Initial Value Registers (IVRs).

The WRs can be read or written to directly using the I2C serial

interface as described in the following sections. The I2C

interface Address Byte has to be set to 00h, 01h, 02h or 03h to

access the WR of DCP0, DCP1, DCP2 or DCP3 respectively.

Memory Description

The ISL22346 contains seven non-volatile and five volatile 8-

bit registers. The memory map of ISL22346 is on Table 1. The

four non-volatile registers (IVRi) at address 0, 1, 2 and 3

contain initial wiper value and volatile registers (WRi) contain

FN6177 Rev 2.00

September 3, 2009

Page 11 of 16

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