MC100LVEL11DTR2 데이터 시트보기 (PDF) - ON Semiconductor
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MC100LVEL11DTR2 Datasheet PDF : 8 Pages
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MC100LVEL11
3.3V ECL 1:2
Differential Fanout Buffer
Description
The MC100LVEL11 is a differential 1:2 fanout buffer. The device is
functionally similar to the E111 device but with higher performance
capabilities. Having within-device skews and output transition times
significantly improved over the E111, the LVEL11 is ideally suited for
those applications which require the ultimate in AC performance.
The differential inputs of the LVEL11 employ clamping circuitry to
maintain stability under open input conditions. If the inputs are left open
(pulled to VEE) the Q outputs will go LOW.
Features
• 330 ps Propagation Delay
• 5 ps Skew Between Outputs
• High Bandwidth Output Transitions
• The 100 Series Contains Temperature Compensation
• PECL Mode Operating Range: VCC = 3.0 V to 3.8 V
with VEE = 0 V
• NECL Mode Operating Range: VCC = 0 V
with VEE = −3.0 V to −3.8 V
• Internal Input Pulldown Resistors
• Q Output will Default LOW with Inputs Open or at VEE
• Pb−Free Packages are Available
Q0 1
Q0 2
8 VCC
7D
Q1 3
6D
Q1 4
5 VEE
Figure 1. Logic Diagram and Pinout Assignment
http://onsemi.com
8
1
SOIC−8
D SUFFIX
CASE 751
8
1
TSSOP−8
DT SUFFIX
CASE 948R
MARKING
DIAGRAMS*
8
KVL11
ALYW
G
1
8
KV11
ALYWG
G
1
DFN8
MN SUFFIX
CASE 506AA
14
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
M = Date Code
G = Pb−Free Package
(Note: Microdot may be in either location)
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
© Semiconductor Components Industries, LLC, 2006
1
December, 2006 − Rev. 8
Publication Order Number:
MC100LVEL11/D
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