STM6321(2004) 데이터 시트보기 (PDF) - STMicroelectronics

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STM6321
(Rev.:2004)

5-Pin Supervisor with Watchdog Timer and Push-button Reset

STMicroelectronics 

STM6321/6322/6821/6822/6823/6824/6825

Ensuring a Valid Reset Output Down to

VCC = 0V. The STM6xxx Supervisors are guaran-

teed to operate properly down to VCC = 1V. In ap-

plications that require valid reset levels down to

VCC = 0, a pull-down resistor to active-low outputs

(push/pull only, see Figure 9.) and a pull-up resis-

tor to active-high outputs (push/pull only, see Fig-

ure 10.) will ensure that the reset line is valid while

the reset output can no longer sink or source cur-

rent. This scheme does not work with the open

drain outputs of the STM6321/6322/6822.

The resistor value used is not critical, but it must

be large enough not to load the reset output when

VCC is above the reset threshold. For most appli-

cations, 100kΩ is adequate.

Interfacing to Microprocessors with Bi-

directional Reset Pins

Microprocessors with bi-directional reset pins can

contend with the STM6321/6322/6821/6822/6823/

6824/6825 reset output. For example, if the reset

output is driven high and the microprocessor

wants to pull it low, signal contention will result. To

prevent this from occurring, connect a 4.7kΩ resis-

tor between the reset output and the microproces-

sor’s reset I/O as in Figure 11..

Figure 9. Ensuring RST Valid to VCC = 0,

(Active-Low Push-pull Outputs)

STM6XXX

GND

VCC

RST

VCC

R1

AI09138

Figure 10. Ensuring RST Valid to VCC = 0,

(Active-High, Push-pull Outputs)

STM6XXX

GND

VCC

RST

VCC

R1

AI09139

Note: This configuration does not work on open drain outputs of the

STM6321/6322/6822.

Figure 11. Interfacing to Microprocessors with

Bi-directional Reset I/O

Buffered Reset to other

System Components

VCC

STM6XXX

4.7k

RST

GND

VCC

Microprocessor

RST

GND

AI09135

8/21

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