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MAX706ATEPA 데이터 시트보기 (PDF) - Maxim Integrated

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MAX706ATEPA Datasheet PDF : 15 Pages
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+3V Voltage Monitoring, Low-Cost µP
Supervisory Circuits
sees 1.25V when VIN falls to the desired trip point
(VTRIP). Resistor R3 adds hysteresis. R3 will typically
be an order of magnitude greater than R1 and R2. The
current through R1 and R2 should be at least 1µA to
ensure that the 25nA (max) PFI input current does not
shift the trip point significantly. R3 should be larger than
10kto prevent it from loading down the PFO pin.
Capacitor C1 adds noise rejection.
PART
TEMP
RANGE
PIN-
PACKAGE
MAX706PEUA
MAX706PMJA
-40°C to +85°C 8 µMAX
-55°C to +125°C 8 CERDIP*
MAX706RCPA
MAX706RCSA
MAX706RCUA
MAX706REPA
MAX706RESA
0°C to +70°C
0°C to +70°C
0°C to +70°C
-40°C to +85°C
-40°C to +85°C
8 Plastic Dip
8 SO
8 µMAX
8 Plastic Dip
8 SO
MAX706REUA
MAX706RMJA
MAX706SCPA
MAX706SCSA
MAX706SCUA
MAX706SEPA
MAX706SESA
MAX706SEUA
MAX706SMJA
MAX706TCPA
-40°C to +85°C 8 µMAX
-55°C to +125°C 8 CERDIP*
0°C to +70°C 8 Plastic Dip
0°C to +70°C 8 SO
0°C to +70°C 8 µMAX
-40°C to +85°C 8 Plastic Dip
-40°C to +85°C 8 SO
-40°C to +85°C 8 µMAX
-55°C to +125°C 8 CERDIP*
0°C to +70°C 8 Plastic Dip
MAX706TCSA
MAX706TCUA
MAX706TEPA
MAX706TESA
MAX706TEUA
0°C to +70°C
0°C to +70°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
8 SO
8 µMAX
8 Plastic Dip
8 SO
8 µMAX
MAX706TMJA -55°C to +125°C 8 CERDIP*
MAX706APEPA -40°C to +85°C 8 Plastic Dip
MAX706APESA -40°C to +85°C 8 SO
MAX706APEUA -40°C to +85°C 8 µMAX
MAX706AREPA
MAX706ARESA
MAX706AREUA
MAX706ASEPA
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
8 Plastic Dip
8 SO
8µMAX
8 Plastic Dip
PKG
CODE
U8-1
J8-2
P8-1
S8-2
U8-1
P8-1
S8-2
U8-1
J8-2
P8-1
S8-2
U8-1
P8-1
S8-2
U8-1
J8-2
P8-1
S8-2
U8-1
P8-1
S8-2
U8-1
J8-2
P8-1
S8-2
U8-1
P8-1
S8-2
U8-1
P8-1
Monitoring a Negative Voltage
The power-fail comparator can be used to monitor a
negative supply voltage using the circuit of Figure 8.
When the negative supply is valid, PFO is low. When
the negative supply voltage drops, PFO goes high. This
circuit’s accuracy is affected by the PFI threshold toler-
ance, the VCC voltage, and resistors R1 and R2.
Bypassing VCC
For noisy systems, bypass VCC with a 0.1µF capacitor
to GND.
Ordering Information (continued)
PART
TEMP
RANGE
PIN-
PACKAGE
PKG
CODE
MAX706ASESA -40°C to +85°C 8 SO
S8-2
MAX706ASEUA -40°C to +85°C 8 µMAX
U8-1
MAX706ATEPA -40°C to +85°C 8 Plastic Dip P8-1
MAX706ATESA -40°C to +85°C 8 SO
S8-2
MAX706ATEUA -40°C to +85°C 8 µMAX
U8-1
MAX708RCPA 0°C to +70°C 8 Plastic Dip P8-1
MAX708RCSA 0°C to +70°C 8 SO
S8-2
MAX708RCUA 0°C to +70°C 8 µMAX
U8-1
MAX708REPA -40°C to +85°C 8 Plastic Dip P8-1
MAX708RESA -40°C to +85°C 8 SO
S8-2
MAX708REUA -40°C to +85°C 8 µMAX
U8-1
MAX708RMJA -55°C to +125°C 8 CERDIP*
J8-2
MAX708SCPA 0°C to +70°C 8 Plastic Dip P8-1
MAX708SCSA 0°C to +70°C 8 SO
S8-2
MAX708SCUA 0°C to +70°C 8 µMAX
U8-1
MAX708SEPA -40°C to +85°C 8 Plastic Dip P8-1
MAX708SESA -40°C to +85°C 8 SO
S8-2
MAX708SEUA -40°C to +85°C 8 µMAX
U8-1
MAX708SMJA -55°C to +125°C 8 CERDIP*
J8-2
MAX708TCPA 0°C to +70°C 8 Plastic Dip P8-1
MAX708TCSA 0°C to +70°C 8 SO
S8-2
MAX708TCUA 0°C to +70°C 8 µMAX
U8-1
MAX708TEPA -40°C to +85°C 8 Plastic Dip P8-1
MAX708TESA -40°C to +85°C 8 SO
S8-2
MAX708TEUA -40°C to +85°C 8 µMAX
U8-1
MAX708TMJA -55°C to +125°C 8 CERDIP*
J8-2
SO, µMAX, and PDIP packages are available in lead-free.
*Contact factory for availability and processing to MIL-STD-883.
**Future product—contact factory for availability.
Chip Information
PROCESS: CMOS
10 ______________________________________________________________________________________

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