IS42S16100 데이터 시트보기 (PDF) - Integrated Circuit Solution Inc
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IS42S16100
Integrated Circuit Solution Inc
IS42S16100 Datasheet PDF : 78 Pages
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IS42S16100
OPERATING FREQUENCY / LATENCY RELATIONSHIPS
Symbol Parameter
—
Clock Cycle Time
—
Operating Frequency
tCAC CAS Latency
tRCD Active Command To Read/Write Command Delay Time
tRAC RAS Latency (tRCD + tCAC)
tRC Command Period (REF to REF / ACT to ACT)
tRAS Command Period (ACT to PRE)
tRP Command Period (PRE to ACT)
tRRD Command Period (ACT[0] to ACT [1])
tCCD Column Command Delay Time
(READ, READA, WRIT, WRITA)
tDPL Input Data To Precharge Command Delay Time
tDAL Input Data To Active/Refresh Command Delay Time
(During Auto-Precharge)
tRBD Burst Stop Command To Output in HIGH-Z Delay Time
(Read)
tWBD Burst Stop Command To Input in Invalid Delay Time
(Write)
tRQL Precharge Command To Output in HIGH-Z Delay Time
(Read)
tWDL Precharge Command To Input in Invalid Delay Time
(Write)
tPQL Last Output To Auto-Precharge Start Time (Read)
tQMD DQM To Output Delay Time (Read)
tDMD DQM To Input Delay Time (Write)
tMCD Mode Register Set To Command Delay Time
-6
-7
6
7
166 143
3
3
3
3
6
6
10 10
6
6
3
3
2
2
1
1
2
2
5
5
3
3
0
0
3
3
0
0
–2 –2
2
2
0
0
2
2
AC TEST CONDITIONS (Input/Output Reference Level: 1.4V)
Input
CLK
2.0V
1.4V
0.8V
2.0V
INPUT 1.4V
tCK
tCHI
tCL
tCS
tCH
0.8V
tAC
tOH
OUTPUT
1.4V
1.4V
Output Load
ZO = 50Ω
I/O
50 Ω
30 pF
+1.4V
-8. Units
8 ns
125 MHz
3 cycle
3 cycle
6 cycle
10 cycle
6 cycle
3 cycle
2 cycle
1 cycle
2 cycle
5 cycle
3 cycle
0 cycle
3 cycle
0 cycle
–2 cycle
2 cycle
0 cycle
2 cycle
8
Integrated Circuit Solution Inc.
DR006-0B
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