PCF2127A 데이터 시트보기 (PDF) - NXP Semiconductors.

부품명

상세내역

제조사

PCF2127A

Integrated RTC, TCXO and quartz crystal

NXP Semiconductors. 

NXP Semiconductors

PCF2127A

Integrated RTC, TCXO and quartz crystal

8. Functional description

The PCF2127A is a Real Time Clock (RTC) and calendar with an on-chip Temperature

Compensated Crystal (Xtal) Oscillator (TCXO) and a 32.768 kHz quartz crystal integrated

into the same package.

Address and data are transferred by a selectable 400 kHz Fast-mode I2C-bus or a 3 line

SPI-bus with separate data input and output (see Section 9). The maximum speed of the

SPI-bus is 6.5 Mbit/s.

The PCF2127A contains 30 8-bit registers that are used for many different functions, such

as clock, alarm, watchdog, timer, timestamp etc. (see Section 8.1).

The PCF2127A has an output reset pin: the output reset is activated on Power-On Reset

(POR), and whenever the oscillator is stopped (see Section 8.8).

The PCF2127A features 512 bytes of general purpose static RAM, which is battery

backed and can be used independently of the RTC functionality (see Section 8.5).

The PCF2127A has a backup battery input pin and backup battery switch-over circuit

which monitors the main power supply and automatically switches to the backup battery

when a power failure condition is detected (see Section 8.6.1). Accurate timekeeping is

maintained even when the main power supply is interrupted.

A battery low detection circuit monitors the status of the battery (see Section 8.6.3). When

the battery voltage goes below a certain threshold value, a flag is set to indicate that the

battery must be replaced. This can be used to ensure the integrity of the data during

periods of battery backup. A power failure detection circuit monitors the voltage of the

power fail input pin PFI. When the voltage on the power fail input pin PFI goes below an

internal reference (1.25 V), the power fail output pin PFO is activated (see Section 8.6.4).

PCF2127A_2

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 02 — 7 May 2010

© NXP B.V. 2010. All rights reserved.

5 of 80

Share Link: