PCF2127A 데이터 시트보기 (PDF) - NXP Semiconductors.
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PCF2127A Datasheet PDF : 80 Pages
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NXP Semiconductors
PCF2127A
Integrated RTC, TCXO and quartz crystal
• Address registers 1Ah and 1Bh define the RAM address. Address register 1Ch
(RAM_wrt_cmd) is the RAM write command; address register 1Dh (RAM_rd_cmd) is
the RAM read command. Data is transferred to or from the RAM via the serial
interface (see Section 8.5).
• The registers Seconds, Minutes, Hours, Days, Months, and Years are all coded in
Binary Coded Decimal (BCD) format to simplify application use. Other registers are
either bit-wise or standard binary.
When one of the RTC registers is written or read, the content of all counters is temporarily
frozen. This prevents a faulty writing or reading of the clock and calendar during a carry
condition (see Section 8.9.8).
Table 4. Register overview
Bit positions labeled as - are not implemented and will return a 0 when read. Bit T must always be written with logic 0. Bits
labeled as X are undefined at power-on and unchanged by subsequent resets.
Address Register name Bit
Reset value
7
6
5
4
3
2
1
0
Control registers
00h
Control_1
EXT_ T
TEST
STOP TSF1 POR_ 12_24 MI
SI
0000 0000
OVRD
01h
Control_2
MSF WDTF TSF2 AF
CDTF TSIE AIE
CDTIE 0000 0000
02h
Control_3
PWRMNG[2:0]
BTSE BF
BLF BIE
BLIE 0000 0000
Time and date registers
03h
Seconds
OSF
SECONDS (0 to 59)
1XXX XXXX
04h
Minutes
-
MINUTES (0 to 59)
- XXX XXXX
05h
Hours
-
-
AMPM HOURS (1 to 12) in 12 h mode
- - XX XXXX
HOURS (0 to 23) in 24 h mode
- - XX XXXX
06h
Days
-
-
DAYS (1 to 31)
- - XX XXXX
07h
Weekdays
-
-
-
-
-
WEEKDAYS (0 to 6) - - - - - XXX
08h
Months
-
-
-
MONTHS (1 to 12)
- - - X XXXX
09h
Years
YEARS (0 to 99)
XXXX XXXX
Alarm registers
0Ah
Second_alarm AE_S
SECOND_ALARM (0 to 59)
1XXX XXXX
0Bh
Minute_alarm AE_M
MINUTE_ALARM (0 to 59)
1XXX XXXX
0Ch
Hour_alarm
AE_H -
AMPM HOUR_ALARM (1 to 12) in 12 h mode
1 - XX XXXX
-
HOUR_ALARM (0 to 23) in 24 h mode
1 - XX XXXX
0Dh
Day_alarm
AE_D -
DAY_ALARM (1 to 31)
1 - XX XXXX
0Eh
Weekday_alarm AE_W -
-
-
-
WEEKDAY_ALARM (0 to 6) 1 - - - - XXX
CLKOUT control register
0Fh
CLKOUT_ctl
TCR[1:0]
-
-
-
COF[2:0]
00 - - - 000
Watchdog registers
10h
Watchdg_tim_ctl WD_CD[1:0]
TI_TP -
-
-
TF[1:0]
000 - - - 11
11h
Watchdg_tim_val WATCHDG_TIM_VAL[7:0]
XXXX XXXX
Timestamp registers
12h
Timestp_ctl
TSM TSOFF -
1_O_16_TIMESTP[4:0]
00 - X XXXX
13h
Sec_timestp
-
SECOND_TIMESTP (0 to 59)
- XXX XXXX
PCF2127A_2
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 02 — 7 May 2010
© NXP B.V. 2010. All rights reserved.
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