ATMEGA32(2008) 데이터 시트보기 (PDF) - Atmel Corporation

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ATMEGA32
(Rev.:2008)

8-bit Microcontroller with 32K Bytes In-System Programmable Flash

Atmel Corporation 

ATmega32(L)

The EEPROM Address

Register – EEARH and Bit

EEARL

Read/Write

Initial Value

15

–

EEAR7

7

R

R/W

0

X

14

–

EEAR6

6

R

R/W

0

X

13

–

EEAR5

5

R

R/W

0

X

12

–

EEAR4

4

R

R/W

0

X

11

–

EEAR3

3

R

R/W

0

X

10

–

EEAR2

2

R

R/W

0

X

9

EEAR9

EEAR1

1

R/W

R/W

0

X

8

EEAR8

EEAR0

0

R/W

R/W

X

X

EEARH

EEARL

• Bits 15..10 – Res: Reserved Bits

These bits are reserved bits in the ATmega32 and will always read as zero.

• Bits 9..0 – EEAR9..0: EEPROM Address

The EEPROM Address Registers – EEARH and EEARL – specify the EEPROM address in the

1024 bytes EEPROM space. The EEPROM data bytes are addressed linearly between 0 and

1023. The initial value of EEAR is undefined. A proper value must be written before the

EEPROM may be accessed.

The EEPROM Data

Register – EEDR

Bit

Read/Write

Initial Value

7

6

MSB

R/W

R/W

0

0

5

R/W

0

4

R/W

0

3

R/W

0

2

R/W

0

1

R/W

0

0

LSB

R/W

0

EEDR

• Bits 7..0 – EEDR7.0: EEPROM Data

For the EEPROM write operation, the EEDR Register contains the data to be written to the

EEPROM in the address given by the EEAR Register. For the EEPROM read operation, the

EEDR contains the data read out from the EEPROM at the address given by EEAR.

The EEPROM Control

Register – EECR

Bit

7

6

5

4

3

2

1

0

–

–

–

–

EERIE EEMWE EEWE EERE

EECR

Read/Write

R

R

R

R

R/W

R/W

R/W

R/W

Initial Value

0

0

0

0

0

0

X

0

• Bits 7..4 – Res: Reserved Bits

These bits are reserved bits in the ATmega32 and will always read as zero.

• Bit 3 – EERIE: EEPROM Ready Interrupt Enable

Writing EERIE to one enables the EEPROM Ready Interrupt if the I bit in SREG is set. Writing

EERIE to zero disables the interrupt. The EEPROM Ready interrupt generates a constant inter-

rupt when EEWE is cleared.

• Bit 2 – EEMWE: EEPROM Master Write Enable

The EEMWE bit determines whether setting EEWE to one causes the EEPROM to be written.

When EEMWE is set, setting EEWE within four clock cycles will write data to the EEPROM at

the selected address If EEMWE is zero, setting EEWE will have no effect. When EEMWE has

been written to one by software, hardware clears the bit to zero after four clock cycles. See the

description of the EEWE bit for an EEPROM write procedure.

19

2503N–AVR–06/08

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