LDFM50DT-TR 데이터 시트보기 (PDF) - STMicroelectronics

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LDFM50DT-TR

500 mA very low drop voltage regulator

STMicroelectronics 

Pin configuration

2

Pin configuration

Figure 2: Pin connection (top view)

LDFM

Pin n°

PPAK DPAK

5

-

2

1

4

3

1

-

3

2

TAB

TAB

Table 1: Pin description DPAK, PPAK

Symbol

Function

ADJ/PG

VIN

VOUT

EN

GND

GND

For adjustable versions: error amplifier input pin.

For fixed version: Power Good output

Input voltage

Output voltage

Enable pin logic input: Low = shutdown, High = active

Ground

Ground

Pin n°

2

6

1

5

3

4

exposed

pad

Table 2: Pin description DFN6-2x2 and 3x3

Symbol

Function

ADJ/NC

For adjustable versions: error amplifier input pin. For fixed version: not

connected

VIN

VOUT

EN

Input voltage

Output Voltage

Enable pin logic input: low = shutdown, high = active

PG Power good output

GND Ground

GND Ground

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DocID023585 Rev 4

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