M64898GP 데이터 시트보기 (PDF) - MITSUBISHI ELECTRIC
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M64898GP Datasheet PDF : 8 Pages
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MITSUBISHI ICs (TV)
M64898GP
PLL FREQUENCY SYNTHESIZER WITH DC-DC CONVERTER FOR PC
Setting up for the test mode
T2 T1 T0 Charge pump
0 0 X Normal operation
0 1 X High impedance
1 1 0 Sink
1 1 1 Source
1 0 0 High impedance
1 0 1 High impedance
12 pin output
LD
LD
LD
LD
fREF
f1/N
Mode
Normal operation
Test mode
Test mode
Test mode
Test mode
Test mode
Set up for the reference Frequency divider ratio
RSa
RSb
1
1
0
1
X
0
Divider ratio
1/512
1/1024
1/640
Set up the tuning amplifier
OS
Tuning voltage output
0
ON
1
OFF
Mode
Normal
Test
Power on reset operation
(Initial state the power is turned ON)
BS4 to BS1
: OFF
Charge pump
: High impedance
Tuning amplifier
: OFF
Charge pump current : 270µA ∗
Frequency divider ratio : 1/1024
Lock detect
:H
∗ Charge pump current is replaced by 70µA when locks it by
automatic change facility.
TIMING DIAGRAM
tr
ENABLE
10%
90%
1.5V
tINT
tf
VIH
90%
10%
VIL
tINT
tBT
VIH
90%
90%
DATA
1.5V
10%
10%
VIL
tr
tf
VIH
90%
90%
1.5V10%
10%
CLOCK
VIL
tPWC
tr
tf
tSU(D)
tH(D)
tH(E)
tBCL
tSU(E)
CRYSTAL OSCILLATOR CONNECTION DIAGRAM
16
18pF
4MHz
Crystal oscillator characteristics
Actual resistance : less then 300Ω
Load capacitance : 20pF
7
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