HC2510 데이터 시트보기 (PDF) - Hynix Semiconductor
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HC2510 Datasheet PDF : 6 Pages
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HC2510C
Table 1. Pin Description
Pin Name
CLK
FBIN
G
FBOUT
1Y(0:9)
AVcc
AGND
Vcc
GND
Pin No.
24
13
11
12
3,4,5,8,9
15,16,17,20,2
1
23
1
2,10,14,22
6,7,18,19
Type
I
I
I
O
O
Power
Groun
d
Power
Groun
d
Functional Description
Clock Input. CLK provides the reference signal to the internal
PLL.
Feedback Input. FBIN provides the feedback signal to the
internal PLL.
Output Bank Enable. When G is high, all outputs 1Y(0:9) are
enabled.
When G is low, Outputs 1Y(0:9) are disable to a logic-low
state.
Feedback Output. FBOUT completes the feedback loop of the
PLL by being wired to FBIN.
Clock Outputs. These outputs provide low-skew copies of
CLKIN. Each output has an embedded series-damping
resistor.
Analog Power Supply. AVcc provides the power reference for
the analog circuitry. AVcc can be also used to bypass the PLL
for the test purpose. When AVcc is strapped to ground, PLL is
bypassed and CLK is buffered directly to the device outputs.
Analog Ground. AGND provides the ground reference for the
analog circuitry.
Power Supply
Ground
Table 2. Absolute Maximum Ratings Over Operating Free-air
Temperature Range
Symbols
Vcc
VI
Vo
IIK
IOK
Io
PMAX
Tstg
Parameter
Supply Voltage Range
Input Voltage Range
Voltage Range applied to any
input in the high or low state
Input Clamp Current
Output Clamp Current
Continuous Output Current
Maximum Power Dissipaiton
Storage Temperature Range
Value
-0.5 to 4.6
-0.5 to 6.5
-0.5 to Vcc+0.5
±50
±50
±50
0.7
- 65 to 150
Unit
V
V
V
mA
mA
mA
W
°C
Conditions
VI <0 or V I >Vcc
Vo<0 or Vo >Vcc
Vo =0 to Vcc
3
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