RT8004A 데이터 시트보기 (PDF) - Richtek Technology

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RT8004A

4.5A, 4MHz, Synchronous Step-Down Regulator

Richtek Technology 

RT8004A

gradually raises the clamp on COMP after the EN/SS pin

is pulled above 0.8V. The full current range becomes

available on COMP after 1024 switching cycles. If a longer

soft-start period is desired, the clamp on COMP can be

set externally with a resistor and capacitor on the EN/SS

pin as shown in Typical Application Circuit. The soft-start

duration can be calculated by using the following formula:

TSS = RSS x CSS x ln( VIN ) (s)

VIN − 1.8V

Thermal Considerations

For continuous operation, do not exceed absolute

maximum junction temperature. The maximum power

dissipation depends on the thermal resistance of the IC

package, PCB layout, rate of surrounding airflow, and

difference between junction and ambient temperature. The

maximum power dissipation can be calculated by the

following formula :

PD(MAX) = (TJ(MAX) − TA) / θJA

where TJ(MAX) is the maximum junction temperature, TA is

the ambient temperature, and θJA is the junction to ambient

thermal resistance.

For recommended operating condition specifications of

the RT8004A, the maximum junction temperature is 125°C

and TA is the ambient temperature. The junction to ambient

thermal resistance, θJA, is layout dependent. For

TSSOP-16 (Exposed Pad) packages, the thermal

resistance, θJA, is 47° C/W on a standard JEDEC 51-7

four-layer thermal test board. For VQFN-16L 4X4 packages,

the thermal resistance, θJA, is 54°C/W on a standard

JEDEC 51-7 four-layer thermal test board. The maximum

power dissipation at TA = 25°C can be calculated by the

following formula :

PD(MAX) = (125°C − 25°C) / (47°C/W) = 2.128W for

TSSOP-16 (Exposed Pad) package

PD(MAX) = (125°C − 25°C) / (54°C/W) = 1.852W for

VQFN-16L 4X4 package

The maximum power dissipation depends on the operating

ambient temperature for fixed TJ(MAX) and thermal

resistance, θJA. For the RT8004A packages, the derating

curves in Figure 2 allow the designer to see the effect of

rising ambient temperature on the maximum power

dissipation.

DS8004A-03 March 2011

2.2

2.0

1.8

1.6

1.4

1.2

1.0

0.8

0.6

0.4

0.2

0.0

0

Four-Layer PCB

TSSOP-16 (Exposed Pad)

VQFN-16L 4x4

25

50

75

100

125

Ambient Temperature (°C)

Figure 2. Derating Curves for RT8004A Package

Layout Considerations

Follow the PCB layout guidelines for optimal performance

of RT8004A.

` A ground plane is recommended. If a ground plane layer

is not used, the signal and power grounds should be

segregated with all small-signal components returning

to the GND pin at one point that is then connected to

the PGND pin close to the IC. The exposed pad should

be connected to GND.

` Connect the terminal of the input capacitor(s), CIN, as

close as possible to the PVDD pin. This capacitor

provides the AC current into the internal power

MOSFETs.

` LX node is with high frequency voltage swing and should

be kept small area. Keep all sensitive small-signal nodes

away from LX node to prevent stray capacitive noise

pick-up.

` Flood all unused areas on all layers with copper.

Flooding with copper will reduce the temperature rise

of power components. You can connect the copper areas

to any DC net (PVIN, SVIN, VOUT, PGND, SGND, or

any other DC rail in your system).

` Connect the FB pin directly to the feedback resistors.

The resistor divider must be connected between VOUT

and GND.

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