ISPLSI1016E-100LT44 데이터 시트보기 (PDF) - Lattice Semiconductor

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ISPLSI1016E-100LT44

In-System Programmable High Density PLD

Lattice Semiconductor 

Specifications ispLSI 1016E

Switching Test Conditions

Input Pulse Levels

GND to 3.0V

Figure 2. Test Load

Input Rise and Fall Time

10% to 90%

-125

-100, -80

≤ 2 ns

≤ 3 ns

+ 5V

Input Timing Reference Levels

Output Timing Reference Levels

Output Load

3-state levels are measured 0.5V from

steady-state active level.

1.5V

1.5V

See Figure 2

Table 2-0003/1016E

Output Load Conditions (see Figure 2)

TEST CONDITION

A

R1

R2

CL

470Ω 390Ω 35pF

Device

NS Output

R1

Test

Point

R2

CL*

ESIG *CL includes Test Fixture and Probe Capacitance.

D 0213a

Active High

∞ 390Ω 35pF

B

Active Low

W Active High to Z

E C at VOH-0.5V

Active Low to Z

N at VOL+0.5V

470Ω 390Ω

∞ 390Ω

35pF

5pF

470Ω

390Ω 5pF

Table 2-0004/1016E

R DC Electrical Characteristics

FO Over Recommended Operating Conditions

SYMBOL

PARAMETER

CONDITION

MIN. TYP.3 MAX. UNITS

A VOL

Output Low Voltage

IOL= 8 mA

–

–

0.4

V

E VOH

Output High Voltage

IOH = -4 mA

2.4

–

–

V

6 IIL

Input or I/O Low Leakage Current

0V ≤ VIN ≤ VIL (Max.)

–

–

-10

μA

1 IIH

Input or I/O High Leakage Current

3.5V ≤ VIN ≤ VCC

–

–

10

μA

0 IIL-isp ispEN Input Low Leakage Current

0V ≤ VIN ≤ VIL

–

– -150 μA

1 IIL-PU I/O Active Pull-Up Current

0V ≤ VIN ≤ VIL

–

– -150 μA

I IOS1

Output Short Circuit Current

VCC= 5V, VOUT = 0.5V

–

– -200 mA

LS ICC2, 4 Operating Power Supply Current

VIL= 0.5V, VIH = 3.0V

Commercial

–

90

–

mA

fCLOCK = 1 MHz

Industrial

–

90

–

mA

Table 2-0007/1016E

p 1. One output at a time for a maximum duration of one second. VOUT = 0.5V was selected to avoid test problems

is by tester ground degradation. Characterized but not 100% tested.

2. Measured using four 16-bit counters.

3. Typical values are at VCC= 5V and TA= 25°C.

E 4. Maximum ICC varies widely with specific device configuration and operating frequency. Refer to the Power Consumption

S section of this data sheet and Thermal Management section of the Lattice Semiconductor Data Book or CD-ROM to estimate

Umaximum ICC .

4

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