TA8430 데이터 시트보기 (PDF) - Toshiba

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TA8430

TOSHIBA BIPOLAR LINEAR INTEGRATED CIRCUIT SILICON MONOLITHIC

Toshiba 

BLOCK DIAGRAM

TA8430AF

Note 1: GND terminal of 12 / 13 connect to FIN.

Note 2: Output Voltages, appeared at φA, φ A, φB and φ B, are adjusted by Rreg when Power Save function is

selected.

Note 3: Utmost care is necessary in the design of the output line, VCC, VS and GND line since IC may be destroyed

due to short−circuit between outputs, air contamination fault, or fault by improper grounding.

PIN FUNCTION

PIN No.

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

Fin

SYMBOL

ENA

ENB

VCC

INA

INB

PS

REG

ST

VS

φB

φB

PG

PG

φA

φA

VS

GND

FUNCTION

A channel enable

B channel enable

Supply voltage

A channel reciprocal switching

B channel reciprocal switching

Energy−saving signal input

Output voltage setting

Stand−by signal input

Supply voltage

B output

B output

Power supply GND connection

Power supply GND connection

A output

A output

Supply voltage

GND connection

2

2003-08-04

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