SK70704PE 데이터 시트보기 (PDF) - Intel

부품명

상세내역

제조사

SK70704PE

1168 Kbps HSDL Data Pump Chip Set

Intel 

SK70704/SK70707 or SK70708

1168 Kbps HSDL Data Pump Chip Set

Datasheet

The HDSL Data Pump is a chip set consisting of the following two devices:

s SK70704 Analog Core Chip (ACC)

s SK70707 (68-pin PLCC) or SK70708 (44-pin PLCC) HDSL Digital Transceiver (HDX)

The HDSL Data Pump is a 2-wire transceiver which provides echo-cancelling and 2B1Q line

coding. It incorporates transmit pulse shaping, filtering, line drivers, receive equalization, timing

and data recovery to provide 1168 kbps, clear-channel, “data pipe” transmission. The Data Pump

provides Near-End Cross-Talk (NEXT) performance in excess of that required over all ETSI test

loops. Typical transmission range on 0.4 mm cable exceeds 3.6 km in a noise-free environment

or 2.8 km with a 0 dB margin over 10 µV/√Hz ETSI noise.

The Data Pump meets the requirements of ETSI ETR-152. It provides one end of a single-channel

HDSL transmission system from the twisted pair interface back to the Data Pump/HDSL data

interface. The Data Pump can be used at either the NTU or the LTU end of the interface.

Applications

s E1 (2-pair) and fractional E1 transport

s N-channel digital pair-gain

s Wireless base station to switch interface

s

Product Features

s Campus and private networking

s High-Speed digital modems

s Fully integrated, 2-chip set for interfacing

to 2-wire HDSL lines at 1168 kbps

s Single +5 V supply

s Integrated line drivers, filters and hybrid

circuits result in greatly reduced external

logic and simplified support circuitry

requirements

s Simple line interface circuitry, via

transformer coupling, to twisted pair line

s Internal ACC voltage reference

s Integrated VCO circuitry

s Converts serial binary data to scrambled

2B1Q

encoded data

s Self-contained activation/start-up state

machine for simplified single loop designs

s Programmable for either line termination

(LTU) or network termination (NTU)

applications

s Compliant with ETSI ETR-152 (1995)

s Compliant with ITU G.991.1

s Design allows for operation in either

Software Control or stand alone Hardware

Control mode

s Typical power consumption less than 1.2 W

allowing remote power feeding for repeater

and NTU equipment

s Input or Output Reference Clock of 18.688

MHz

s Digital representation of receive signal

level and noise margin values available for

SNR controlled activation

As of January 15, 2001, this document replaces the Level One document

SK70704/SK70707 or SK70708 — 1168 Kbps HSDL Data Pump Chip Set.

Order Number: 249193-001

January 2001

Share Link: