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CS4334-DSZ(2008) 데이터 시트보기 (PDF) - Cirrus Logic

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CS4334-DSZ
(Rev.:2008)
CIRRUS
Cirrus Logic CIRRUS
CS4334-DSZ Datasheet PDF : 24 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Confidential Draft
3/11/08
CS4334/5/8/9
Figure 18. Passband Ripple...................................................................................................................... 18
Figure 19. Stopband Rejection.................................................................................................................. 19
Figure 20. Transition Band........................................................................................................................ 19
Figure 21. Transition Band........................................................................................................................ 19
Figure 22. Passband Ripple...................................................................................................................... 19
Figure 23. 0 dBFS FFT (BRM) .................................................................................................................. 20
Figure 24. -60 dBFS FFT (BRM).............................................................................................................. 20
Figure 25. Idle Channel Noise FFT (BRM)................................................................................................ 20
Figure 26. Twin Tone IMD FFT (BRM)...................................................................................................... 20
Figure 27. THD+N vs. Amplitude (BRM) ................................................................................................... 20
Figure 28. THD+N vs. Frequency (BRM) .................................................................................................. 20
Figure 29. 0 dBFS FFT (HRM).................................................................................................................. 21
Figure 30. -60 dBFS FFT (HRM).............................................................................................................. 21
Figure 31. Idle Channel Noise FFT (HRM) ............................................................................................... 21
Figure 32. Twin Tone IMD FFT (HRM) ..................................................................................................... 21
Figure 33. THD+N vs. Amplitude (HRM)................................................................................................... 21
Figure 34. THD+N vs. Frequency (HRM)................................................................................................. 21
LIST OF TABLES
Table 1. Common Clock Frequencies ...................................................................................................... 13
PIN DESCRIPTIONS
SERIAL DATA INPUT
DE-EMPHASIS / SCLK
LEFT / RIGHT CLOCK
MASTER CLOCK
SDATA 1
DEM/SCLK 2
LRCK 3
MCLK 4
8 AOUTL ANALOG LEFT CHANNEL OUTPUT
7 VA
ANALOG POWER
6 AGND ANALOG GROUND
5 AOUTR ANALOG RIGHT CHANNEL OUTPUT
No. Pin Name I/O
Pin Function and Description
Serial Audio Data Input - Two’s complement MSB-first serial data is input on this pin. The data is
1
SDATA
I clocked into the CS4334/5/8/9 via internal or external SCLK, and the channel is determined by
LRCK.
2
DEM/SCLK
I
De-Emphasis/External Serial Clock Input - Used for de-emphasis filter control or external serial
clock input.
3
LRCK
I
Left/Right Clock - Determines which channel is currently being input on the Audio Serial Data
Input pin, SDATA.
4
MCLK
I
Master Clock - Frequency must be 256x, 384x, or 512x the input sample rate in BRM and either
128x or 192x the input sample rate in HRM.
5
AOUTR
O Analog Right Channel Output - Typically 3.5 Vp-p for a full-scale input signal.
6
AGND
I Analog Ground - Analog ground reference is 0V.
7
VA
I Analog Power - Analog power supply is nominally +5 V.
8
AOUTL
O Analog Left Channel Output - Typically 3.5 Vp-p for a full-scale input signal.
DS248F5
3

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