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ICS308

SERIAL PROGRAMMABLE QUAD PLL VERSACLOCK SYNTHESIZER

Integrated Device Technology 

DATASHEET

SERIAL PROGRAMMABLE QUAD PLL VERSACLOCK SYNTHESIZER ICS308

Description

The ICS308 is a versatile serially programmable, quad

PLL clock source. The ICS308 can generate any

frequency from 250 kHz to 200 MHz, and up to 6

different output frequencies simultaneously. The

outputs can be reprogrammed on the fly, and will lock to

a new frequency in 10 ms or less. Smooth transitions

(in which the clock duty cycle remains roughly 50%) are

guaranteed if the output divider is not changed.

The device includes a PDTS pin which tri-states the

output clocks and powers down the entire chip.

The ICS308 default for non-programmed start-up are

buffered reference clock outputs on all clock output

pins.

Features

• Packaged in 20-pin SSOP (QSOP)

• Available in Pb (lead) free package

• Operating voltage of 3.3 V

• Highly accurate frequency generation

• M/N Multiplier PLL: M = 1..2048, N = 1..1024

• Serially programmable: user determines the output

frequency via a 3-wire interface

• Eliminates need for custom quartz oscillators

• Input crystal frequency of 5 - 27 MHz

•Optional programmable on-chip crystal capacitors

• Output clock frequencies up to 200 MHz

• Reference clock output

• Power down tri-state mode

• Very low jitter

Block Diagram

STROBE

SCLK

DATA

Crystal or

clock input

X1/ICLK

X2

Crystal

O s c illa to r

External capacitors are

required with a crystal input.

VDD 3

PLL1

PLL2

PLL3

PLL4

Divide

Logic

and

Output

Enable

Control

GND 2

PDTS

CLK1

CLK2

CLK3

CLK4

CLK5

CLK6

CLK7

CLK8

CLK9

IDT™ / ICS™ SERIAL PROGRAMMABLE QUAD PLL VERSACLOCK SYNTHESIZER 1

ICS308

REV J 120507

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