MAS9090B 데이터 시트보기 (PDF) - Micronas
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MAS9090B Datasheet PDF : 30 Pages
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PIN CONFIGURATION
SO28
NC
1
VCCA 2
VCCP 3
NC
4
SP1- 5
SP1+ 6
SP2- 7
SP2+ 8
GNDP 9
RX 10
CCLK 11
CS 12
CI
13
BZ 14
28 MIC3+
27 MIC3-
26 GNDA
25 MIC1+
24 MIC1-
23 MIC2+
22 MIC2-
21 LO
20 MCLK
19 FS
18 GND
17 TX
16 CO
15 VCC
DA9090B.001
January 14, 1998
TQFP44
MM
M
VV
I IG I
CC
CCN C
NNCCNN 3 3DN 1
CCPACC + - AC+
44 43 42 41 40 39 38 37 36 35 34
NC 1
SP1- 2
SP1 3
NC 4
SP2- 5
SP2 6
NC 7
GNDP 8
NC 9
RX 10
NC 11
12 13 14 15 16 17 18 19 20 21 22
N NCC C B V C T GN
CCCS I ZCOXNC
L
C
D
K
33 MIC1-
32 NC
31 MIC2+
30 MIC2-
29 NC
28 NC
27 NC
26 LO
25 MCLK
24 FS
23 NC
PIN DESCRIPTION
Pin Name
VCCA
VCCP
SP1-
SP1+
SP2-
SP2+
GNDP
RX
CCLK
CS
CI
BZ
VCC
CO
TX
GND
FS
Pin Number
SO28 TQFP44
1,4
1,4,7,9
11,12,13
22,23,27
28,29,32
35,39,40,
43,44
2
41
3
42
5
2
6
3
7
5
8
6
9
8
10
10
11
14
12
15
13
16
14
17
15
18
16
19
17
20
18
21
19
24
Type Function
No connection.
P Positive power supply input for analog section.
P Positive power supply input for speaker amplifiers.
AO Speaker 1 amplifier negative output.
AO Speaker 1 amplifier positive output.
AO Speaker 2 amplifier negative output.
AO Speaker 2 amplifier positive output.
G Speaker amplifier.
DI Receive data input.
DI Control clock input. Shifts serially into CI and CO when CS is
low. CCLK is asynchronous with other system clocks.
DI Chip select input.
DI Control data input.
AO Buzzer driver output.
P Positive power supply input for the digital section. VCCA,
VCCP AND VCC must be connected together.
DO Control data output.
DO Transmit data output. Data is shifted out on this during the
assigned transmit slots. Otherwise, TX is on high impedance
state.
G Ground for the digital section.
DI Frame sync input. This 8kHz signal defines the start of the TX
and RX frames.
2
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