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QL82SD-7PB516I 데이터 시트보기 (PDF) - QuickLogic Corporation

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QL82SD-7PB516I
QuickLogic
QuickLogic Corporation QuickLogic
QL82SD-7PB516I Datasheet PDF : 60 Pages
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QL82SD Device Data Sheet Rev C
Programmable I/O
Up to 252 Programmable I/O pins
High performance Enhanced I/O (EIO): Less than 3 ns Tco
Programmable Slew Rate Control
Programmable I/O Standards
LVTTL, LVCMOS, PCI, GTL+, SSTL2, and SSTL3, LVDS, LVPECL
Four Independent I/O Banks
Three Register Configuration: Input, Output, OE
Embedded Computational Unit (ECU) Blocks
Integrated multiply, add, and accumulate function
18 distributed MAC blocks
8 × 8 multiply (sign & unsigned)
16-bit carry add
Advanced Clock Network
Nine Global Clock Networks consisting of:
one dedicated
eight programmable
Eight I/O (high drive) networks: two I/Os per bank
Ten Quad-Net Networksfive per quadrant
IO Block
IO Block
RAM Blocks
Embedded Computational Units (ECUs)
2016 Logic Cells
RAM Blocks
LVDS/SERDES IO Block
Figure 1: QL82SD Device Block Diagram
Customer Part #
QL82SD-PQ208
QL82SD-PT280
QL82SD-PS484
QL82SD-PB516
Table 1: QL82SD Device Table
SERDES LVDS SRAM Logic ECU
Data Clocks Blocks Cells Blocks
4
2
36 2016 18
8
2
36 2016 18
8
2
36 2016 18
8
2
36 2016 18
Programmable I/O
75
121
209
252
2
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Preliminary
© 2002 QuickLogic Corporation

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