UPD703100 데이터 시트보기 (PDF) - NEC => Renesas Technology

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UPD703100

V850E/MS1™, V850E/MS2™ 32-Bit Single-Chip Microcontrollers

NEC => Renesas Technology 

CONTENTS

CHAPTER 1 INTRODUCTION........................................................................................................................... 14

1.1 General .................................................................................................................................................. 14

1.2 Features ................................................................................................................................................ 15

1.3 Product Development .......................................................................................................................... 16

1.4 CPU Configuration ............................................................................................................................... 17

1.5 Differences with Architecture of V850 CPU....................................................................................... 18

CHAPTER 2 REGISTER SET ........................................................................................................................... 20

2.1 Program Registers ............................................................................................................................... 20

2.1.1 Program register set ................................................................................................................................ 20

2.2 System Registers ................................................................................................................................. 23

2.2.1 Interrupt status saving registers............................................................................................................... 23

2.2.2 NMI status saving registers...................................................................................................................... 24

2.2.3 Exception cause register.......................................................................................................................... 24

2.2.4 Program status word................................................................................................................................ 24

2.2.5 CALLT caller status saving registers ....................................................................................................... 26

2.2.6 ILGOP caller status saving registers........................................................................................................ 26

2.2.7 CALLT base pointer ................................................................................................................................. 26

2.2.8 System register number........................................................................................................................... 27

CHAPTER 3 DATA TYPES............................................................................................................................... 28

3.1 Data Format .......................................................................................................................................... 28

3.1.1 Data type and addressing ........................................................................................................................ 28

3.2 Data Representation ............................................................................................................................ 29

3.2.1 Integer...................................................................................................................................................... 29

3.2.2 Unsigned integer...................................................................................................................................... 30

3.2.3 Bit............................................................................................................................................................. 30

3.3 Data Alignment ..................................................................................................................................... 30

CHAPTER 4 ADDRESS SPACE ...................................................................................................................... 31

4.1 Memory Map ......................................................................................................................................... 32

4.2 Addressing Mode ................................................................................................................................. 33

4.2.1 Instruction address................................................................................................................................... 33

4.2.2 Operand address ..................................................................................................................................... 36

CHAPTER 5 INSTRUCTIONS ........................................................................................................................... 39

5.1 Instruction Format ............................................................................................................................... 39

5.2 Outline of Instructions......................................................................................................................... 43

5.3 Instruction Set ...................................................................................................................................... 47

5.4 Number of Instruction Execution Clock Cycles .............................................................................. 128

10

User’s Manual U12197EJ6V0UM

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