74ALVC32-Q100 데이터 시트보기 (PDF) - NXP Semiconductors.

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74ALVC32-Q100

Quad 2-input OR gate

NXP Semiconductors. 

Nexperia

74ALVC32-Q100

Quad 2-input OR gate

9, 

W:

QHJDWLYH

SXOVH

90



9

WI

9,

SRVLWLYH

SXOVH

WU



90



9

W:

9,

*

9&&

92

'87

57

90

WU

WI

90

9(;7

5/

&/

5/

DDH

Fig 7.

Test data is given in Table 9.

Definitions for test circuit:

RL = Load resistance.

CL = Load capacitance including jig and probe capacitance.

RT = Termination resistance should be equal to output impedance Zo of the pulse generator.

VEXT = External voltage for measuring switching times.

Test circuitry for measuring switching times

Table 9. Test data

Supply voltage VCC

1.65 V to 1.95 V

2.3 V to 2.7 V

2.7 V

3.0 V to 3.6 V

Input

VI

VCC

VCC

2.7 V

2.7 V

tr, tf

 2.0 ns

 2.0 ns

 2.5 ns

 2.5 ns

Load

CL

30 pF

30 pF

50 pF

50 pF

RL

1 k

500 

500 

500 

VEXT

tPLH, tPHL

open

open

open

open

tPLZ, tPZL

2  VCC

2  VCC

6V

6V

tPHZ, tPZH

GND

GND

GND

GND

74ALVC32-Q100

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 1 — 16 May 2014

© Nexperia B.V. 2017. All rights reserved

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