ICS843252 데이터 시트보기 (PDF) - Integrated Circuit Systems

부품명

상세내역

제조사

ICS843252

FEMTOCLOCKS™ CRYSTAL-TO-3.3V LVPECL FREQUENCY SYNTHESIZER

Integrated Circuit Systems 

Integrated

Circuit

Systems, Inc.

PRELIMINARY

ICS843252

FEMTOCLOCKS™CRYSTAL-TO-3.3V LVPECL

FREQUENCY SYNTHESIZER

RECOMMENDATIONS FOR UNUSED INPUT AND OUTPUT PINS

INPUTS:

OUTPUTS:

LVCMOS CONTROL PINS:

All control pins have internal pull-ups or pull-downs; additional

resistance is not required but can be added for additional

protection. A 1kΩ resistor can be used.

LVPECL OUTPUT

All unused LVPECL outputs can be left floating. We

recommend that there is no trace attached. Both sides of the

differential output pair should either be left floating or

terminated.

TERMINATION FOR 3.3V LVPECL OUTPUT

The clock layout topology shown below is a typical termi-

nation for LVPECL outputs. The two different layouts men-

tioned are recommended only as guidelines.

FOUT and nFOUT are low impedance follower outputs that

generate ECL/LVPECL compatible outputs. Therefore, ter-

minating resistors (DC current path to ground) or current

sources must be used for functionality. These outputs are

designed to drive 50Ω transmission lines. Matched imped-

ance techniques should be used to maximize operating

frequency and minimize signal distortion. Figures 3A and

3B show two different layouts which are recommended

only as guidelines. Other suitable clock layouts may exist

and it would be recommended that the board designers

simulate to guarantee compatibility across all printed cir-

cuit and clock component process variations.

Zo = 50Ω

FOUT

FIN

Zo = 50Ω

50Ω

RTT =

1

((VOH + VOL) / (VCC – 2)) – 2

Zo

50Ω

VCC - 2V

RTT

FOUT

3.3V

125Ω

125Ω

Zo = 50Ω

FIN

Zo = 50Ω

84Ω

84Ω

FIGURE 3A. LVPECL OUTPUT TERMINATION

FIGURE 3B. LVPECL OUTPUT TERMINATION

843252AG

www.icst.com/products/hiperclocks.html

10

REV. A NOVEMBER 9, 2005

Share Link: