M14C32-WS2X 데이터 시트보기 (PDF) - STMicroelectronics

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M14C32-WS2X

Memory Card IC 64/32 Kbit Serial I²C Bus EEPROM

STMicroelectronics 

M14C64, M14C32

Table 6. Operating Modes

Mode

Current Address Read

Random Address Read

Sequential Read

Byte Write

Page Write

Note: 1. X = VIH or VIL.

RW bit

‘1’

‘0’

‘1’

‘1’

‘0’

‘0’

WC 1

X

X

X

X

VIL

VIL

Bytes

1

1

≥1

1

≤ 32

Initial Sequence

START, Device Select, RW = ‘1’

START, Device Select, RW = ‘0’, Address

reSTART, Device Select, RW = ‘1’

Similar to Current or Random Mode

START, Device Select, RW = ‘0’

START, Device Select, RW = ‘0’

Figure 7. Write Mode Sequences with WC=0

WC

BYTE WRITE

ACK

ACK

ACK

ACK

DEV SEL

BYTE ADDR BYTE ADDR

DATA IN

R/W

WC

PAGE WRITE

WC (cont'd)

PAGE WRITE

(cont'd)

ACK

ACK

ACK

ACK

DEV SEL

BYTE ADDR BYTE ADDR DATA IN 1

DATA IN 2

R/W

ACK

ACK

DATA IN N

AI01106B

Page Write

The Page Write mode allows up to 32 bytes to be

written in a single write cycle, provided that they

are all located in the same ’row’ in the memory:

that is the most significant memory address bits

(b13-b5 for the M14C64 and b12-b5 for the

M14C32) are the same. The master sends from

one up to 32 bytes of data, each of which is ac-

knowledged by the memory if the WC pin is low. If

the WC pin is high, each data byte is followed by a

NoACK and the location is not modified. After each

byte is transferred, the internal byte address coun-

ter (the five least significant bits only) is increment-

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