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74VHCT02-Q100(2020) 데이터 시트보기 (PDF) - Nexperia B.V. All rights reserved

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74VHCT02-Q100
(Rev.:2020)
NEXPERIA
Nexperia B.V. All rights reserved NEXPERIA
74VHCT02-Q100 Datasheet PDF : 12 Pages
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74VHC02-Q100; 74VHCT02-Q100
Quad 2-input NOR gate
Rev. 2 — 15 April 2020
Product data sheet
1. General description
The 74VHC02-Q100; 74VHCT02-Q100 are high-speed Si-gate CMOS devices and are pin
compatible with Low-power Schottky TTL (LSTTL). They are specified in compliance with JEDEC
standard No. 7-A.
The 74VHC02-Q100; 74VHCT02-Q100 provide a quad 2-input NOR function.
This product has been qualified to the Automotive Electronics Council (AEC) standard Q100
(Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from -40 °C to +85 °C and from -40 °C to +125 °C
Balanced propagation delays
All inputs have a Schmitt-trigger action
Inputs accept voltages higher than VCC
Input levels:
The 74VHC02-Q100 operates with CMOS input level
The 74VHCT02-Q100 operates with TTL input level
ESD protection:
MIL-STD-883, method 3015 exceeds 2000 V
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 Ω)
Multiple package options
DHVQFN package with Side-Wettable Flanks enabling Automatic Optical Inspection (AOI) of
solder joints
3. Ordering information
Table 1. Ordering information
Type number
Package
Temperature range Name
74VHC02D-Q100
-40 °C to +125 °C SO14
74VHCT02D-Q100
74VHC02PW-Q100 -40 °C to +125 °C TSSOP14
74VHCT02PW-Q100
74VHC02BQ-Q100 -40 °C to +125 °C DHVQFN14
74VHCT02BQ-Q100
Description
plastic small outline package; 14 leads;
body width 3.9 mm
plastic thin shrink small outline package;
14 leads; body width 4.4 mm
plastic dual in-line compatible thermal
enhanced very thin quad flat package; no leads;
14 terminals; body 2.5 × 3 × 0.85 mm
Version
SOT108-1
SOT402-1
SOT762-1

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