74VHCT02D-Q100(2020) 데이터 시트보기 (PDF) - Nexperia B.V. All rights reserved
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74VHCT02D-Q100 Datasheet PDF : 12 Pages
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Nexperia
74VHC02-Q100; 74VHCT02-Q100
Quad 2-input NOR gate
10.1. Waveforms and test circuit
Fig. 6.
VI
nA, nB input
VM
GND
VOH
tPLH
tPHL
nY output
VM
VOL
001aah085
Measurement points are given in Table 8.
VOL and VOH are typical voltage output levels that occur with the output load.
Input to output propagation delays
Table 8. Measurement points
Type
74VHC02-Q100
74VHCT02-Q100
Input
VM
0.5VCC
1.5 V
Output
VM
0.5VCC
0.5VCC
VI 90 %
negative
pulse
GND
VI
positive
pulse
GND 10 %
VM
10 %
tf
tr
90 %
VM
VI
G
RT
tW
tW
VCC
DUT
VM
tr
tf
VM
VO
CL
001aah768
Fig. 7.
Test data is given in Table 9.
Definitions test circuit:
RT = termination resistance should be equal to output impedance Zo of the pulse generator.
CL = load capacitance including jig and probe capacitance.
Test circuit for measuring switching times
Table 9. Test data
Type
74VHC02-Q100
74VHCT02-Q100
Input
VI
VCC
3.0 V
tr, tf
≤ 3.0 ns
≤ 3.0 ns
Load
CL
15 pF, 50 pF
15 pF, 50 pF
Test
tPLH, tPHL
tPLH, tPHL
74VHC_VHCT02_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 15 April 2020
© Nexperia B.V. 2020. All rights reserved
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