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ISL6292D 데이터 시트보기 (PDF) - Renesas Electronics

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ISL6292D
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ISL6292D Datasheet PDF : 13 Pages
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ISL6292D
As the TEMP pin voltage rises from low and exceeds the 1.5V
threshold (when the V2P8 pin is forced with a 3V bias), the
under temperature signal rises and does not clear until the
TEMP pin voltage falls below the 1.286V falling threshold.
Similarly, the over-temperature signal is given when the TEMP
pin voltage falls below the 0.605V threshold and does not clear
until the voltage rises above 0.66V. The actual accuracy of the
3V bias is not important because all the thresholds and the
TEMP pin voltage are ratios determined by the resistor
dividers, as shown in Figure 7.
The NTC thermistor is required to have a resistance ratio of
3.96:1 at the low and the high temperature limits, that is,
R--R---C--H--O--O---L--T-D-- = 3.96
(EQ. 7)
This is because at the low temperature limit, the TEMP pin
voltage is 1.5V, which is 1/2 of the 3V bias. Thus,
RCOLD = RU
(EQ. 8)
where RU is the pull-up resistor as shown in Figure 7. On the
other hand, at the high temperature limit the TEMP pin voltage
is 0.605V, 20.17% of the 3V bias. Therefore,
R-----RH----UO-----T- = 1-----0–----.-02---.0--2--1-0--7--1---7--
(EQ. 9)
For applications that do not need to monitor the battery
temperature, the NTC thermistor can be replaced with a
regular resistor of a half value of the pull up resistor RU.
Another option is to connect the TEMP pin to the IREF pin that
has a 0.8V output. With such connection, the IREF pin can no
longer be programmed with logic inputs.
Battery Removal Detection
The ISL6292D assumes that the thermistor is co-packed with
the battery and is removed together with the battery. When the
3.4V
2.8V
VIN
V2P8
2.4V
FIGURE 8. THE V2P8 PIN OUTPUT vs THE INPUT VOLTAGE
AT THE VIN PIN. VERTICAL: 1V/DIV,
HORIZONTAL: 100ms/DIV
STAT1
STAT2
STATUS
Temp
Fault
TIMEOUT
Fault
CTIME
OSC
TIME
DFF1
DFF8 DFF9
(A)
TIME
OSC
Output
DFF1
Output
DFF8
Output
DFF9
Output
(B)
FIGURE 9. EQUIVALENT CIRCUIT FOR THE STAT1/STAT2
INDICATION PINS AND KEY OPERATING
WAVEFORMS
charger senses a TEMP pin voltage that is 2.1V or higher, it
assumes that the battery is removed. The battery removal
detection circuit is also shown in Figure 7. When a battery is
removed, the charger is stopped. When a battery is inserted
again, a new charge cycle starts.
Indications
The ISL6292D has three indication pins: V2P8, STAT1, and
STAT2. The input presence is indicated by the V2P8 pin.
Figure 8 shows the V2P8 pin voltage vs. the input voltage. The
equivalent circuit for the STAT1 and STAT2 pins are shown in
Figure 9. Both pins have ESD diodes to clamp the pin voltage
between ground and the input, as shown in the Block Diagram.
The STATUS block outputs a logic HIGH when the charger is
charging and a LOW whenever the charger is not charging.
When a fault case happens, the charger stops charging,
therefore, the STATUS block outputs LOW. Depending on fault
cause, either the eighth or the ninth D-type flip-flop output is
gated to the STAT1 pin. Both flip-flop outputs are 50% duty
ratio blinking signals. The periods of the eighth and ninth flip-
flop output are calculated by the following equations:
T8th = 28 TOSC = 256 TOSC
(EQ. 10)
T9th = 29 TOSC = 512 TOSC
(EQ. 11)
Table 1 and 2 summarize the LED indication driven by STAT1
and STAT2 respectively.
FN9166 Rev.0.00
July 2004
Page 11 of 13

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