74HC3G07DC 데이터 시트보기 (PDF) - Nexperia B.V. All rights reserved
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74HC3G07DC Datasheet PDF : 12 Pages
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5. Functional diagram
1A
1Y
2A
2Y
1
1A
1Y
1
2A
2Y
3A
3Y
001aah762
Fig. 1. Logic symbol
1
3A
3Y
001aah763
Fig. 2. IEC logic symbol
6. Pinning information
74HC3G07; 74HCT3G07
Triple buffer with open-drain outputs
Y
A
GND mna591
Fig. 3. Logic diagram (one buffer)
6.1. Pinning
74HC3G07
74HCT3G07
1A 1
3Y 2
2A 3
GND 4
8 VCC
7 1Y
6 3A
5 2Y
001aak032
Fig. 4. Pin configuration SOT505-2 (TSSOP8) and SOT765-1 (VSSOP8)
6.2. Pin description
Table 3. Pin description
Symbol
1A, 2A, 3A
GND
1Y, 2Y, 3Y
VCC
Pin
1, 3, 6
4
7, 5, 2
8
Description
data input
ground (0 V)
data output
supply voltage
7. Functional description
Table 4. Function table
H = HIGH voltage level; L = LOW voltage level; Z = high-impedance OFF-state.
Input nA
Output nY
L
L
H
Z
74HC_HCT3G07
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 5 — 24 January 2019
© Nexperia B.V. 2019. All rights reserved
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