74LV164D-Q100 데이터 시트보기 (PDF) - Nexperia B.V. All rights reserved

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74LV164D-Q100

8-bit serial-in/parallel-out shift register

Nexperia B.V. All rights reserved 

Nexperia

74LV164-Q100

8-bit serial-in/parallel-out shift register

5. Pinning information

5.1 Pinning

/94

'6$ 

'6% 

4 

4 

4 

4 

*1' 

 9&&

 4

 4

 4

 4

 05

 &3

DDD

Fig 4. Pin configuration SO14 and TSSOP14

/94

WHUPLQDO

LQGH[DUHD

'6% 

4 

4 

4 

4 

9&&

 4

 4

 4

 4

 05

DDD

7UDQVSDUHQWWRSYLHZ

(1) This is not a supply pin. The substrate is attached to this

pad using conductive die attach material. There is no

electrical or mechanical requirement to solder this pad.

However, if it is soldered, the solder land should remain

floating or be connected to VCC.

Fig 5. Pin configuration DHVQFN14

5.2 Pin description

Table 2.

Symbol

DSA

DSB

Q0

Q1

Q2

Q3

GND

CP

MR

Q4

Q5

Q6

Q7

VCC

Pin description

Pin

1

2

3

4

5

6

7

8

9

10

11

12

13

14

Description

data input SA

data input SB

output 0

output 1

output 2

output 3

ground (0 V)

clock input (edge triggered LOW-to-HIGH)

master reset input (active LOW)

output 4

output 5

output 6

output 7

supply voltage

74LV164_Q100

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 2 — 18 September 2014

© Nexperia B.V. 2017. All rights reserved

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