74LV164PW-Q100 데이터 시트보기 (PDF) - Nexperia B.V. All rights reserved
부품명
상세내역
제조사
74LV164PW-Q100 Datasheet PDF : 19 Pages
| |||
Nexperia
74LV164-Q100
8-bit serial-in/parallel-out shift register
Table 7. Dynamic characteristics …continued
GND = 0 V; tr = tf 2.5 ns; CL = 50 pF; RL = 1 k; for test circuit, see Figure 9.
Symbol Parameter
Conditions
tsu
set-up time
th
hold time
fmax
maximum frequency
Dn to CP - see Figure 8
VCC = 1.2 V
VCC = 2.0 V
VCC = 2.7 V
VCC = 3.0 V to 3.6 V
VCC = 4.5 V to 5.5 V
Dn to CP - see Figure 8
VCC = 1.2 V
VCC = 2.0 V
VCC = 2.7 V
VCC = 3.0 V to 3.6 V
VCC = 4.5 V to 5.5 V
see Figure 6
VCC = 2.0 V
VCC = 2.7 V
VCC = 3.0 V to 3.6 V
VCC = 4.5 V to 5.5 V
[1] Typical values are measured at nominal VCC and Tamb = 25 C.
[2] tpd is the same as tPLH and tPHL.
[3] Typical values are measured at nominal supply voltage (VCC = 3.3 V).
[4] CPD is used to determine the dynamic power dissipation (PD in W).
PD = CPD VCC2 fi N + (CL VCC2 fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
(CL VCC2 fo) = sum of the outputs.
[5] The condition is VI = GND to VCC.
Min Typ Max Unit
-
-
-
ns
26
-
-
ns
19
-
-
ns
15
-
-
ns
10
-
-
ns
-
-
-
ns
5
-
-
ns
5
-
-
ns
5
-
-
ns
5
-
-
ns
12
-
-
MHz
16
-
-
MHz
20
-
-
MHz
30
-
-
MHz
74LV164_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 18 September 2014
© Nexperia B.V. 2017. All rights reserved
9 of 19
Share Link: 