74LVT162373 데이터 시트보기 (PDF) - Nexperia B.V. All rights reserved
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74LVT162373
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74LVT162373 Datasheet PDF : 13 Pages
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Nexperia
74LVT162373
3.3 V 16-bit transparent D-type latch with 30 Ω termination resistors; 3-state
Symbol
tPLZ
Parameter
LOW to OFF-state
propagation delay
tsu(H)
set-up time HIGH
tsu(L)
set-up time LOW
th(H)
hold time HIGH
th(L)
hold time LOW
tWH
pulse width HIGH
Conditions
nOE to nQn; see Fig. 8
VCC = 2.7 V
VCC = 3.0 V to 3.6 V
nDn to nLE; see Fig. 9
VCC = 2.7 V
VCC = 3.0 V to 3.6 V
nDn to nLE; see Fig. 9
VCC = 2.7 V
VCC = 3.0 V to 3.6 V
nDn to nLE; see Fig. 9
VCC = 2.7 V
VCC = 3.0 V to 3.6 V
nDn to nLE; see Fig. 9
VCC = 2.7 V
VCC = 3.0 V to 3.6 V
nLE; see Fig. 7
VCC = 2.7 V
VCC = 3.0 V to 3.6 V
[1] Typical values are at VCC = 3.3 V and Tamb = 25 °C.
Min
Typ[1]
Max Unit
-
-
5.0 ns
0.1
3.2
5.1 ns
1.0
-
1.5
0.1
-
ns
-
ns
2.0
-
2.0
0.2
-
ns
-
ns
1.0
-
1.0
0
-
ns
-
ns
2.0
-
1.5
0
-
ns
-
ns
1.5
-
1.5
0.5
-
ns
-
ns
10.1. Waveforms and test circuit
VI
nDn input
VM
VM
GND
VOH
tPHL
tPLH
nQn output
VM
VM
VOL
001aam011
Measurement points are given in Table 8.
VOL and VOH are typical voltage output levels that
occur with the output load.
Fig. 6. Input (nDn) to output (nQn) propagation delays
VI
nLE input
VM
VM
VM
GND
VOH
nQn output
VOL
tW
tPHL
VM
tPLH
VM
001aam012
Measurement points are given in Table 8.
VOL and VOH are typical voltage output levels that
occur with the output load.
Fig. 7. Latch enable input (nLE) to data output (nQn)
propagation delays and pulse width
74LVT162373
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 1 October 2018
© Nexperia B.V. 2018. All rights reserved
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