74LVT16373ADGG 데이터 시트보기 (PDF) - Nexperia B.V. All rights reserved

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74LVT16373ADGG

3.3 V 16-bit transparent D-type latch; 3-state

Nexperia B.V. All rights reserved 

Nexperia

74LVT16373A

3.3 V 16-bit transparent D-type latch; 3-state

VI

nOE input

VM

VM

Fig. 7.

GND

3.0 V

nQn output

LOW-to-OFF

OFF-to-LOW

VOL

tPLZ

VX

tPHZ

tPZL

VM

tPZH

VOH

nQn output

HIGH-to-OFF

OFF-to-HIGH

GND

VY

outputs

enabled

outputs

disabled

VM

outputs

enabled

aaa-029125

Measurement points are given in Table 8.

VOL and VOH are typical voltage output levels that occur with the output load.

OFF-state to HIGH or LOW and HIGH or LOW to OFF-state propagation delays

VI

nDn input

VM

GND

VI

th

tsu

th

tsu

nLE input

VM

GND

001aam013

Measurement points are given in Table 8.

The shaded areas indicate when the input is permitted to change for predictable output performance.

Fig. 8. Input (nDn) to output (nLE) data set-up and hold times

Table 8. Measurement points

Input

VI

2.7 V

VM

1.5 V

Output

VM

1.5 V

VX

VOL + 0.3 V

VY

VOH - 0.3 V

74LVT16373A

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 3 — 1 October 2018

© Nexperia B.V. 2018. All rights reserved

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