74VHC573MX 데이터 시트보기 (PDF) - ON Semiconductor
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74VHC573MX Datasheet PDF : 11 Pages
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AC Electrical Characteristics
Symbol
tPLH, tPHL
Parameter
Propagation Delay
Time (LE to On)
tPLH, tPHL Propagation Delay
Time (D–On)
tPZL, tPZH 3-STATE Output
Enable Time
tPLZ, tPHZ 3-STATE Output
Disable Time
tOSLH, tOSHL Output to Output
Skew
CIN
COUT
CPD
Input Capacitance
Output Capacitance
Power Dissipation
Capacitance
VCC (V)
3.3 ± 0.3
5.0 ± 0.5
3.3 ± 0.3
5.0 ± 0.5
3.3 ± 0.3
5.0 ± 0.5
3.3 ± 0.3
5.0 ± 0.5
3.3 ± 0.3
5.0 ± 0.5
Conditions
CL = 15pF
CL = 50pF
CL = 15pF
CL = 50pF
CL = 15pF
CL = 50pF
CL = 15pF
CL = 50pF
RL = 1kΩ CL = 15pF
CL = 50pF
CL = 15pF
CL = 50pF
RL = 1kΩ CL = 50pF
CL = 50pF
(3)
CL = 50pF
CL = 50pF
VCC = Open
VCC = 5.0V
(4)
TA = 25°C
Min. Typ. Max.
7.6 11.9
10.1 15.4
5.0 7.7
6.5 9.7
7.0 11.0
9.5 14.5
4.5 6.8
6.0 8.8
7.3 11.5
9.8 15.0
5.2 7.7
6.7 9.7
10.7 14.5
6.7 9.7
1.5
1.0
4
10
6
29
TA = –40°C
to +85°C
Min. Max.
1.0 14.0
1.0 17.5
1.0 9.0
1.0 11.0
1.0 13.0
1.0 16.5
1.0 8.0
1.0 10.0
1.0 13.5
1.0 17.0
1.0 9.0
1.0 11.0
1.0 16.5
1.0 11.0
1.5
1.0
10
Units
ns
ns
ns
ns
ns
pF
pF
pF
Notes:
3. Parameter guaranteed by design. tOSLH = |tPLH max – tPLH min|; tOSHL = |tPHL max – tPHL min|
4. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating
current consumption without load. Average operating current can be obtained by the equation:
ICC (Opr.) = CPD • VCC • fIN + ICC / 8 (per Latch). The total CPD when n pcs. of the Latch operates can be
calculated by the equation: CPD(total) = 21 + 8n.
AC Operating Requirements
Symbol
Parameter
tw(H), tw(L) Minimum Pulse Width (LE)
tS
Minimum Setup Time
tH
Minimum Hold Time
VCC
(V)
3.3 ± 0.3
5.0 ± 0.5
3.3 ± 0.3
5.0 ± 0.5
3.3 ± 0.3
5.0 ± 0.5
TA = 25°C
Min. Typ. Max.
5.0
5.0
3.5
3.5
1.5
1.5
TA = –40°C to
+85°C
Min. Max.
5.0
5.0
3.5
3.5
1.5
1.5
Units
ns
ns
ns
©1993 Fairchild Semiconductor Corporation
74VHC573 Rev. 1.3
5
www.fairchildsemi.com
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