ADF4110(Rev0) 데이터 시트보기 (PDF) - Analog Devices

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ADF4110
(Rev.:Rev0)

RF PLL Frequency Synthesizers

Analog Devices 

ADF4110/ADF4111/ADF4112/ADF4113

t3

CLOCK

DATA

DB20 (MSB)

t1

t2

DB19

DB2

t4

DB1

(CONTROL BIT C2)

LE

LE

Figure 1. Timing Diagram

DB0 (LSB)

(CONTROL BIT C1)

t6

t5

ABSOLUTE MAXIMUM RATINGS1, 2

(TA = 25°C unless otherwise noted)

AVDD to GND3 . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +7 V

AVDD to DVDD . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +0.3 V

VP to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +7 V

VP to AVDD . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +5.5 V

Digital I/O Voltage to GND . . . . . . . . –0.3 V to VDD + 0.3 V

Analog I/O Voltage to GND . . . . . . . . . –0.3 V to VP + 0.3 V

REFIN, RFINA, RFINB to GND . . . . . . –0.3 V to VDD + 0.3 V

Operating Temperature Range

Industrial (B Version) . . . . . . . . . . . . . . . –40°C to +85°C

Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C

Maximum Junction Temperature . . . . . . . . . . . . . . . . 150°C

TSSOP θJA Thermal Impedance . . . . . . . . . . . . . 150.4°C/W

CSP θJA Thermal Impedance (Paddle Soldered) . . . 122°C/W

CSP θJA Thermal Impedance

(Paddle Not Soldered) . . . . . . . . . . . . . . . . . . . . . 216°C/W

Lead Temperature, Soldering

Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . 215°C

Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 220°C

NOTES

1Stresses above those listed under Absolute Maximum Ratings may cause perma-

nent damage to the device. This is a stress rating only; functional operation of the

device at these or any other conditions above those listed in the operational

sections of this specification is not implied. Exposure to absolute maximum rating

conditions for extended periods may affect device reliability.

2This device is a high-performance RF integrated circuit with an ESD rating of

< 2 kV and it is ESD sensitive. Proper precautions should be taken for handling

and assembly.

3 GND = AGND = DGND = 0 V.

TRANSISTOR COUNT

6425 (CMOS) and 303 (Bipolar).

CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumu-

late on the human body and test equipment and can discharge without detection. Although the

ADF4110/ADF4111/ADF4112/ADF4113 features proprietary ESD protection circuitry, permanent

damage may occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD

precautions are recommended to avoid performance degradation or loss of functionality.

WARNING!

ESD SENSITIVE DEVICE

Model

Temperature Range

ADF4110BRU

ADF4110BCP

ADF4111BRU

ADF4111BCP

ADF4112BRU

ADF4112BCP

ADF4113BRU

ADF4113BCP

ADF4113BCHIPS

–40°C to +85°C

–40°C to +85°C

–40°C to +85°C

–40°C to +85°C

–40°C to +85°C

–40°C to +85°C

–40°C to +85°C

–40°C to +85°C

–40°C to +85°C

*Contact the factory for chip availability.

ORDERING GUIDE

Package Description

Thin Shrink Small Outline Package (TSSOP)

Chip Scale Package (CSP)

Thin Shrink Small Outline Package (TSSOP)

Chip Scale Package (CSP)

Thin Shrink Small Outline Package (TSSOP)

Chip Scale Package (CSP)

Thin Shrink Small Outline Package (TSSOP)

Chip Scale Package (CSP)

DICE

–4–

Package Option*

RU-16

CP-20

RU-16

CP-20

RU-16

CP-20

RU-16

CP-20

DICE

REV. 0

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