MC34923DW 데이터 시트보기 (PDF) - Freescale Semiconductor

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MC34923DW

Full-Bridge PWM Motor Driver

Freescale Semiconductor 

Freescale Semiconductor, Inc.

SYSTEM/APPLICATION INFORMATION

INTRODUCTION

The 34923 is designed for pulse-width modulated (PWM)

current control of DC motors. It is capable of continuous output

currents up to 2.0 A and operating voltages of up to 45 V.

Internal fixed off-time PWM current-control timing circuitry can

be programmed via a serial interface to operate in slow, fast,

and mixed current decay modes.

DIR and PWM/ENABLE input pins are provided for use in

controlling the speed and direction of a DC motor with externally

applied PWM-control signals. The PWM/ENABLE input can be

programmed via the serial port to PWM the bridge in fast or slow

current decay. Internal synchronous rectification control

circuitry is provided to reduce power dissipation during PWM

operation.

Internal circuit protection includes thermal shutdown with

hysteresis and crossover-current protection. Special power-up

sequencing is not required.

FUNCTIONAL PIN DESCRIPTION

VB

This pin provides a node for charge storage at the boost

voltage. Internal circuitry will draw VB current from this node,

and the charge pump will deliver charge to this node.

CP1 and CP2

These pins are the connections to the switching capacitor in

the charge pump. These pins swing between ground and VB,

drawing charge from VBB and delivering it to the VB node.

DIR

This is the direction input for the H-bridge driver.

PWM/ENABLE

This pin is the enable input for the H-bridge driver. When

asserted this will bring the H-bridge out of tri-state mode so that

it can drive a load.

PWMMODE

This logic input controls the H-bridge output mode when the

PWM is deasserted. The H-bridge can have an active or

passive output state when the PWM input is deasserted.

OSC

This logic input is the clock for the on-board decay time

generator used only when in internal PWM mode. The decay

time can be slow or mixed fast and slow.

VDD

This is the power supply input for the internal logic and

several other functions.

DATA

This logic input is the serial data used by the serial interface.

CLOCK

This logic input is the clock for the serial interface. Data is

shifted in synchronously with this clock.

STROBE

This logic input is used to latch data from the serial interface

into the internal logic.

VREF

This input provides a reference voltage for the current limit

comparator threshold.

DCMA and DCMB

These are the high-current, high-voltage drive signals for the

motor.

VBB

This is the motor drive voltage input. The H-bridge will deliver

this voltage to the motor.

SPAN

This logic-level input controls the current limit comparator

threshold that is generated from VREF.

VREG

This output is a decoupling node for the internal bandgap

reference voltage generator.

MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA

For More Information On This Product,

Go to: www.freescale.com

34923

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