32174 데이터 시트보기 (PDF) - Renesas Electronics

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32174

32-bit RISC Single-chip Microcomputers

Renesas Electronics 

Revision History

32170/32174 Group User's Manual

Rev. Date of

issue Pages

Contents of revision

Points

2.1 Jan.16,03 P6-50

M32174F4’s virtual-flash emulation area divided in units of 4 Kbytes added

to Figure 6.7.11

P6-51

M32174F3’s virtual-flash emulation area divided in units of 8 Kbytes added

to Figure 6.7.12

M32174F3’s virtual-flash emulation area divided in units of 8 Kbytes added

to Figure 6.7.13

P6-60

Precautions added

P7-4

Table 7.3.2 added

P8-31– Figures 8.4.1 through 8.4.4 corrected

P8-34

P8-35 Section 8.5, “Precautions on Input/output Ports,” newly added

P10-1– Chapter 10 overall. Prescalers uniformly referred to as PRS

P10-232

P10-83 Figure 10.3.8 corrected

P10-184– (1) TOD timer counter write enable/disable conditions newly added

P10-185

P10-213– (1) TOM timer counter write enable/disable conditions newly added

P10-214

P11-3 Table 11.1.1 corrected

P11-48

Contents of description in Section 11.3.5, “Definition of A-D Conversion

Accuracy,” altered

P11-49

Figure 11.3.5 altered

Figures 11.3.6 and 11.3.7 deleted

P11-51

Figure 11.4.1, “Internal Equivalent Circuit of the Analog Input Unit,” newly

added

P12-27

Description of the last line in Section 12.2.8, “SIO Baud Rate Register,”

corrected

Incorrect) 7 or less → Correct) 7 or more

P12-61

Figure 12.7.5, “Timing at Which to Latch Data during UART Reception,”

newly added

P13-2

Description in Section 13.1, “Outline of the CAN Module,” corrected

Incorrect) Compliant with CAN (Controller Area Network) Specification

2.0B

Correct) Compliant with CAN (Controller Area Network) Specification

2.0B active

(2⁄4)

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