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BTS712N1 데이터 시트보기 (PDF) - Siemens AG

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BTS712N1 Datasheet PDF : 14 Pages
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BTS 712 N1
Timing diagrams
Timing diagrams are shown for chip 1 (channel 1/2). For chip 2 (channel 3/4) the diagrams
are valid too. The channels 1 and 2, respectively 3 and 4, are symmetric and consequently
the diagrams are valid for each channel as well as for permuted channels
Figure 1a: Vbb turn on:
IN1
Figure 2b: Switching an inductive load,
IN2
IN
V bb
ST
V
OUT1
V
OUT
V
OUT2
I
L
ST open drain
t
t
Figure 2a: Switching a lamp:
IN
Figure 3a: Turn on into short circuit:
shut down by overtemperature, restart by cooling
IN1 other channel: normal operation
ST
V
OUT
I
L1
I L(SCp)
I L(SCr)
I
L
t off(SC)
ST
t
t
The initial peak current should be limited by the lamp and not by
the initial short circuit current IL(SCp) = 7.5 A typ. of the device.
Heating up of the chip may require several milliseconds, depending
on external conditions (toff(SC) vs. Tj,start see page 10)
Semiconductor Group
11

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