AT91M40800(2002) 데이터 시트보기 (PDF) - Atmel Corporation
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AT91M40800 Datasheet PDF : 19 Pages
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AT91M40800
Pin Description
Table 1. AT91M40800 Pin Description
Module
EBI
AIC
TC
USART
PIO
WD
Clock
Reset
ICE
Power
Name
Function
A0 - A23
Address Bus
D0 - D15
Data Bus
NCS0 - NCS3 Chip Select
CS4 - CS7
Chip Select
NWR0
Lower Byte 0 Write Signal
NWR1
Upper Byte 1 Write Signal
NRD
Read Signal
NWE
Write Enable
NOE
Output Enable
NUB
Upper Byte Select
NLB
Lower Byte Select
NWAIT
Wait Input
BMS
Boot Mode Select
FIQ
Fast Interrupt Request
IRQ0 - IRQ2
External Interrupt Request
TCLK0 - TCLK2 Timer External Clock
TIOA0 - TIOA2 Multipurpose Timer I/O pin A
TIOB0 - TIOB2 Multipurpose Timer I/O pin B
SCK0 - SCK1 External Serial Clock
TXD0 - TXD1 Transmit Data Output
RXD0 - RXD1 Receive Data Input
P0 - P31
Parallel IO line
NWDOVF
Watchdog Overflow
MCKI
Master Clock Input
MCKO
Master Clock Output
NRST
Hardware Reset Input
NTRI
Tri-state Mode Select
TMS
Test Mode Select
TDI
Test Data Input
TDO
Test Data Output
TCK
Test Clock
VDD
Power
GND
Ground
Type
Output
I/O
Output
Output
Output
Output
Output
Output
Output
Output
Output
Input
Input
Input
Input
Input
I/O
I/O
I/O
Output
Input
I/O
Output
Input
Output
Input
Input
Input
Input
Output
Input
Power
Ground
Active
Level
–
–
Low
High
Low
Low
Low
Low
Low
Low
Low
Low
–
–
–
–
–
–
–
–
–
–
Low
–
–
Low
Low
–
–
–
–
–
–
Comments
All valid after reset
A23 - A20 after reset
Used in Byte Write option
Used in Byte Write option
Used in Byte Write option
Used in Byte Select option
Used in Byte Select option
Used in Byte Select option
Used in Byte Select option
Sampled during reset
PIO-controlled after reset
PIO-controlled after reset
PIO-controlled after reset
PIO-controlled after reset
PIO-controlled after reset
PIO-controlled after reset
PIO-controlled after reset
PIO-controlled after reset
Open-drain
Schmidt trigger
Schmidt trigger
Sampled during reset
Schmidt trigger, internal pull-up
Schmidt trigger, internal pull-up
Schmidt trigger, internal pull-up
3
1348DS–ATARM–02/02
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