BCW68G 데이터 시트보기 (PDF) - Fairchild Semiconductor

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BCW68G

PNP General-Purpose Amplifier

Fairchild Semiconductor 

Physical Dimensions

SOT-23

2.92±0.20

3

0.95

1.40

1.30+-00..1250

2.20

(0.29)

1

0.95

1.90

1.20 MAX

(0.93)

C

GAGE PLANE

0.23

0.08

0.20 MIN

(0.55)

2

0.60

0.37

0.20

AB

1.00

1.90

LAND PATTERN

RECOMMENDATION

SEE DETAIL A

0.10

0.00

0.10 C

2.40±0.30

NOTES: UNLESS OTHERWISE SPECIFIED

0.25

SEATING

PLANE

A) REFERENCE JEDEC REGISTRATION

TO-236, VARIATION AB, ISSUE H.

B) ALL DIMENSIONS ARE IN MILLIMETERS.

C) DIMENSIONS ARE INCLUSIVE OF BURRS,

MOLD FLASH AND TIE BAR EXTRUSIONS.

D) DIMENSIONING AND TOLERANCING PER

ASME Y14.5M - 1994.

E) DRAWING FILE NAME: MA03DREV10

SCALE: 2X

Figure 14. 3-LEAD, SOT23, JEDEC TO-236, LOW PROFILE (ACTIVE)

Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner

without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or

obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the

warranty therein, which covers Fairchild products.

Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:

http://www.fairchildsemi.com/dwg/MA/MA03D.pdf.

For current tape and reel specifications, visit Fairchild Semiconductor’s online packaging area:

http://www.fairchildsemi.com/packing_dwg/PKG-MA03D.pdf.

© 1997 Fairchild Semiconductor Corporation

BCW68G Rev. 1.1.0

6

www.fairchildsemi.com

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