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ADSP-BF523C(RevPrC) 데이터 시트보기 (PDF) - Analog Devices

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ADSP-BF523C
(Rev.:RevPrC)
ADI
Analog Devices ADI
ADSP-BF523C Datasheet PDF : 44 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Preliminary Technical Data
ADSP-BF523C/ADSP-BF525C/ADSP-BF527C
The microphone should be connected to the device as shown in
Figure 6.
MICBIAS
FROM
MICROPHONE
R1
C2 +
RMIC
MICIN
R2
C1
AGND
AGND
AGND
Figure 6. Microphone Input External Circuit
Recommended component values are C1 = 220 pF (npo
ceramic), C2 = 1 μF, R1 = 680 Ω, R2 = 47 kΩ. Rmic values
depend on the gain setting (see previous discussion).
R1 and R2 form part of the biasing network. R1 connected to
MICBIAS is necessary only for electret type microphones that
require a voltage bias. R2 should always be present to prevent
the microphone input from charging to a high voltage which
could damage the microphone upon connection. R1 and R2
should be large so as not to attenuate the signal from the micro-
phone, which can have source impedance greater than 2 kΩ. C1
together with the source impedance of the microphone and the
input impedance of MICIN forms an RF filter. C2 is a dc block-
ing capacitor that allows the microphone to be biased at a
different dc voltage than the MICIN signal.
Microphone Bias
The MICBIAS output (shown in Figure 7) provides a low noise
reference voltage suitable for biasing electret type microphones.
The external resistor biasing network is shown in Figure 6,
where MICBIAS is the output of the device (Figure 7).
There is a maximum source current capability of 3 mA available
for the MICBIAS. This limits the smallest value of external bias-
ing resistors that can safely be used.
The MICBIAS output is not active in standby mode.
ADC
The CODEC uses a multi-bit oversampled sigma-delta ADC. A
single channel of the ADC is illustrated in the Figure 8. The use
of multi-bit feedback and high oversampling rates reduces the
effects of jitter and high frequency noise.
FROM
MICROPHONE
INPUT
FROM
LINE
INPUT
+
-
ANALOG
INTEGRATOR
INSEL
MULTIPLE
BITS
Figure 8. MultiBit Oversampling Sigma-Delta ADC
TO ADC
DIGITAL
FILTERS
The ADC full scale input is 1.0 V(rms) at AVDD = 3.3 volts.
Any voltage greater than full scale could overload the ADC and
cause distortion. The full scale input tracks directly with AVDD.
The device uses a pair of ADCs. The input can be selected by
software from either the line inputs or the microphone input.
The two channels cannot be selected independently. The con-
trol is shown in Table 3.
The digital data from the ADC is fed for signal processing to the
ADC filters.
Table 3. ADC Software Control
Register Bit Label Default Description
Address
000 0100 2 INSEL 0
Microphone/Line Input Select
1 = Microphone Input Select
0 = Line Input Select
ADC Filters
The ADC filters perform true 24-bit signal processing to con-
vert the raw multi-bit oversampled data from the ADC to the
correct sampling frequency to be output on the digital audio
interface. Figure 9 illustrates the digital filter path.
VMID
+
-
MICBIAS
R
FROM
ADC
DIGITAL
DECIMATOR
DIGITAL
DECIMATION
FILTER
DIGITAL
HPF
TO DIGITAL
AUDIO
INTERFACE
2R
AGND
Figure 7. MICBIAS Internal Circuit
HPFEN
Figure 9. ADC Digital Filter
The ADC digital filters contain a digital high pass filter, select-
able via software control. There are several types of ADC
filters—frequency and phase responses of these are shown in
Rev. PrC | Page 9 of 44 | June 2008

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