ADM1068ACP-REEL7 데이터 시트보기 (PDF) - Analog Devices

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ADM1068ACP-REEL7

Super Sequencer™ and Monitor

Analog Devices 

ADM1068

Preliminary Technical Data

SPECIFICATIONS

VH = 3.0 V to 14.4 V1, VPn = 3.0 V to 6.0 V1, TA = −40°C to +85°C, unless otherwise noted.

Table 1.

Parameter

POWER SUPPLY ARBITRATION

VH, VPn

VP

VH

VDDCAP

CVDDCAP

POWER SUPPLY

Supply Current, IVH, IVPn

Additional Currents

All PDO FET Drivers On

Current Available from VDDCAP

EEPROM Erase Current

SUPPLY FAULT DETECTORS

VH Pin

Input Attenuator Error

Detection Ranges

High Range

Midrange

VPn Pins

Input Attenuator Error

Detection Ranges

Midrange

Low Range

Ultralow Range

VX Pins

Input Impedance

Detection Ranges

Ultralow Range

Absolute Accuracy

Threshold Resolution

Digital Glitch Filter

REFERENCE OUTPUT

Reference Output Voltage

Load Regulation

Minimum Load Capacitance

Load Regulation

PSRR

Min

Typ Max Unit Test Conditions/Comments

3.0

V

Minimum supply required on one of VPn, VH

6.0

V

Maximum VDDCAP = 5.1 V, typical

14.4 V

VDDCAP = 4.75 V

2.7

4.75 5.4

V

Regulated LDO output

10

µF

Minimum recommended decoupling capacitance

4.2

6

mA VDDCAP = 4.75 V, PDO1–8 off

1

2

10

mA VDDCAP = 4.75 V, PDO1–6 loaded with 1 µA each,

PDO7–8 off

mA Maximum additional load that can be drawn from

all PDO pull-ups to VDDCAP

mA 1 ms duration only, VDDCAP = 3 V

6

2.5

2.5

1.25

0.573

1

0.573

2.043

1

±0.05

%

±0.05

%

14.4 V

6

V

±0.1 %

6

V

3

V

1.375 V

MΩ

1.375 V

±1

%

8

Bits

0

µs

100

µs

2.048 2.053 V

−0.25

mV

0.25

mV

µF

2

mV

60

dB

Midrange

High range

Low range and midrange

No input attenuation error

No input attenuation error

VREF error + DAC nonlinearity + comparator offset

error

Minimum programmable filter length

Maximum programmable filter length

No load

Sourcing current, IDACnMAX = −100 µA

Sinking current, IDACnMAX = 100 µA

Capacitor required for decoupling, stability

Per 100 µA

dc

Rev. PrB | Page 4 of 28

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