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AT91RM9200(2003) 데이터 시트보기 (PDF) - Atmel Corporation

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AT91RM9200
(Rev.:2003)
Atmel
Atmel Corporation Atmel
AT91RM9200 Datasheet PDF : 650 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Power
Management
Controller
System Timer
Real Time Clock
Debug Unit
– One 32-bit Vector Register per interrupt source
– Interrupt Vector Register reads the corresponding current Interrupt Vector
• Protect Mode
– Easy debugging by preventing automatic operations
• Fast Forcing
– Permits redirecting any normal interrupt source on the Fast Interrupt of the
processor
• General Interrupt Mask
– Provides processor synchronization on events without triggering an interrupt
• Optimizes the power consumption of the whole system
• Embeds and controls:
– One Main Oscillator and One Slow Clock Oscillator (32.768Hz)
– Two Phase Locked Loops (PLLs) and Dividers
– Clock Prescalers
• Provides:
– the Processor Clock PCK
– the Master Clock MCK
– the USB Clocks, UHPCK and UDPCK, respectively for the USB Host Port and the
USB Device Port
– Programmable automatic PLL switch-off in USB Device suspend conditions
– up to thirty peripheral clocks
– four programmable clock outputs PCK0 to PCK3
• Four operating modes:
– Normal Mode, Idle Mode, Slow Clock Mode, Standby Mode
• One Period Interval Timer, 16-bit programmable counter
• One Watchdog Timer, 16-bit programmable counter
• One Real-time Timer, 20-bit free-running counter
• Interrupt Generation on event
• Low power consumption
• Full asynchronous design
• Two hundred year calendar
• Programmable Periodic Interrupt
• Alarm and update parallel load
• Control of alarm and update Time/Calendar Data In
• System peripheral to facilitate debug of Atmel’s ARM®-based systems
• Composed of four functions
– Two-pin UART
– Debug Communication Channel (DCC) support
– Chip ID Registers
– ICE Access Prevention
8 AT91RM9200
1768B–ATARM–08/03

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