BR24G04-3A(2013) 데이터 시트보기 (PDF) - ROHM Semiconductor

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BR24G04-3A
(Rev.:2013)

Serial EEPROM series Standard EEPROM I2C BUS EEPROM (2-Wire)

ROHM Semiconductor 

BR24G04-3A

●Serial Input / Output timing

tR

tF1

tHIGH

SCL

tHD:STA

70%

70% 70%

30%

30%

tSU:DAT

tLOW

70%

30%

70%

70%

70%

30%

SDA

(INP(入U力 T))

tBUF

tPD

70%

30%

tHD:DAT

70%

30%

tDH

SDA

(OUTP(出 UT力) )

70%

30%

30%

○Input read at the rise edge of SCL

○Data output in sync with the fall of SCL

70%

30%

tF2

Figure 2-(a). Serial input / output timing

70%

70%

70%

tSU:STA

tHD:STA

tSU:STO

70%

30%

30%

START CONDITION

Figure 2-(b). Start-stop bit timing

STOP CONDITION

D0

write data

(n-th address)

ACK

70%

70%

tWR

STOP CONDITION START CONDITION

Figure 2-(c). Write cycle timing

70%

DATA(1)

D1

D0 ACK

DATA(n)

ACK

70%

tWR

30%

30%

tSU:WP

tHD:WP

STOP CONDITION

Figure 2-(d). WP timing at write execution

DATA(1)

D1 D0 ACK

DATA(n)

tHIGH:WP

70%

70%

ACK

70%

tWR

Figure 2-(e). WP timing at write cancel

Datasheet

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