BR24T08FJ-WSGN 데이터 시트보기 (PDF) - ROHM Semiconductor
부품명
상세내역
제조사
BR24T08FJ-WSGN Datasheet PDF : 39 Pages
| |||
BR24T08-W
Block Diagram
A0 1
A1 2
8Kbit EEPROM Array
Address
Decoder
10bit
Word
Address Register
8bit
Data
Register
A2 3
GND 4
START
Control Circuit
STOP
ACK
High Voltage
Generating Circuit
Power Source
Voltage Detection
8 VCC
7 WP
6 SCL
5 SDA
Figure 3. Block Diagram
Datasheet
Pin Configuration
A0
1
A1
2
A2
3
GND 4
(TOP VIEW)
BR24T08-W
8 Vcc
7 WP
6 SCL
5 SDA
Pin Descriptions
Terminal Input/
Name Output
Descriptions
A0
-
Don’t use (1)
A1
-
Don’t use (1)
A2
Input Slave address setting (2)
GND
SDA
SCL
-
Input/
Output
Input
Reference voltage of all input / output, 0V
Serial data input serial data output
Serial clock input
WP
Input Write protect terminal
VCC
- Connect the power source
(1) Pins not used as device address may be set to any of ‘H’, 'L', and 'Hi-Z'
(2) A2 is not allowed to use as open..
www.rohm.com
©2013 ROHM Co., Ltd. All rights reserved.
TSZ22111･15･001
4/35
TSZ02201-0R2R0G100100-1-2
31.Aug.2017 Rev.006
Share Link: 