T8531A-TL-DB 데이터 시트보기 (PDF) - Agere -> LSI Corporation

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T8531A-TL-DB

Multichannel Programmable Codec Chip Set

Agere -> LSI Corporation 

T8531A/T8532 Multichannel Programmable

Codec Chip Set

General Description (continued)

T8531A Description (continued)

Preliminary Data Sheet

September 2001

8 kHz

PCMRX

µ/A-LAW

TO

LINEAR

RECV

FILTER

REL

RDG

ABS

RDG

INTER-

POLATOR

∑

DIGITAL

∑-∆

1.024 MHz

BALANCE

FILTER

8 kHz

PCMTX

LINEAR

TO

µ/A-LAW

XMT FILTER

REL

TDG

∑

ABS

TDG

Figure 5. T8531A Digital ac Path

CTZ

FILTER

DECIMATOR

÷ 64

1.024 MHz

0498 (F)

T8532

CODEC 0

OSFS

OSCK

OSDR0

OSDR1

OSDX0

OSDX1

CCS0

CDI

CDO

T8532

CDI

CDO

OSFS

OSCK

CODEC 1

CCS1

OSDR2

OSDR3

OSDX2

OSDX3

OCTAL

INTERFACE

CONTROL

INTERFACE

8 kHz SYNC

OSFS

4 MHz CLOCK

OSCK

4 CH RX DATA

OSDR0

4 CH RX DATA

OSDR1

4 CH TX DATA

4 CH TX DATA

OSDX0

OSDX1

CHIP SELECT

CCS0

CONTROL REGISTER CDO

CONTROL REGISTER CDI

T8531A

UPCK

UPCS

UPDI

UPDO

DSP

SCK

SFS

SDR

SDX

STSXB

CLOCK

CHIP SELECT

CONTROL REGISTER IN

CONTROL REGISTER OUT

CLOCK

FRAME SYNC

DATA RECEIVE

DATA TRANSMIT

BACKPLANE

DRIVER ENABLE

MICRO-

PROCESSOR

PCM

BUS

CHIP SELECT

4 CH RX DATA

4 CH RX DATA

4 CH TX DATA

4 CH TX DATA

CCS1

OSDR2

OSDR3

OSDX2

OSDX3

PCM

INTERFACE

Figure 6. Control, PCM, and Octal Interfaces

5-4229.F (F)

6

Agere Systems Inc.

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