MSM7731-01 데이터 시트보기 (PDF) - Oki Electric Industry

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MSM7731-01

Multifunction PCM CODEC (Voice Signal Processor)

Oki Electric Industry 

¡ Semiconductor

MSM7731-01

PIN FUNCTIONAL DESCRIPTION

AIN, AGSX

These are the acoustic analog input and level adjusting pins. The AIN pin is connected to the

inverting input of the internal amp and the AGSX pin is connected to the amp output. For level

adjustment, refer to the diagram below (Figure 1). At power-down reset, the AGSX pin goes to

a high impedance state.

AVFRO, AOUT, APWI

These are the acoustic analog output and level adjusting pins. The AVFRO pin is an audio

output and can directly drive 20 kW. The AOUT pin is an analog output and can directly drive

a load of 1.2 kW. For level adjustment, refer to the diagram below (Figure 1). At power-down

reset, these output pins go to a high impedance state.

LIN, LGSX

These are the line analog input and level adjusting pins. The LIN pin is connected to the

inverting input of the internal amp and the LGSX pin is connected to the amp output. For level

adjustment, refer to the diagram below (Figure 1). At power-down reset, the LGSX pin goes to

a high impedance state. If LIN is not used, short the LIN and LGSX pins together.

LVFRO, LOUT, LPWI

These are the line analog output and level adjusting pins. The LVFRO pin is an audio output

and can directly drive 20 kW. The LOUT pin is an analog output and can directly drive a load

of 1.2 kW. For level adjustment, refer to the diagram below (Figure 1). At power-down reset,

these output pins go to a high impedance state. If LOUT is not used, short the LPWI and LOUT

pins together.

LINEEN

This is the power-down control pin for the line CODEC. A logic "0" continues normal operation

and a logic "1" powers down only the line CODEC. If the line CODEC is not used, power down

the line CODEC and short the LIN pin to the LGSX pin and the LPWI pin to the LOUT pin. This

procedure results in the low consumption of electrical power. At power-down, the output pins

go to a high impedance state. Since this pin is ORed with CR0-B5 of the control register, set the

pin to a logic "0" when controlling power-down by the control register. If the pin setting is

changed, reset must be activated by either the PDN/RST pin or the PDN/RST bit (CR0-B7).

VAGSX/VI=R2/R1

£30

R2≥20kW

Microphone

VI

C1 R1

0.1mF

+

–

10mF

AGSX Acoustic CODEC

Line CODEC

R2

AIN

SG

to ENCODER

–

+

VREF

AVFRO

R3

from DECODER

APWI

C2 R4

Speaker

VO

Speaker amp

VO/VAVFRO=R3/R4

R3≥20kW

AOUT

Acoustic side (microphone, speaker)

Reception signal

Transmission signal

LGSX

LIN

LVFRO

LPWI

LOUT

LINEEN

Figure 1 Analog Interface

Same as the acoustic

analog interface

Line side (portable phone)

5/43

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