TDA9812 데이터 시트보기 (PDF) - Philips Electronics
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TDA9812 Datasheet PDF : 32 Pages
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Philips Semiconductors
Multistandard VIF-PLL and
FM-PLL/AM demodulator
Preliminary specification
TDA9812
Video buffer
For an easy adaption of the sound traps an operational
amplifier with internal feedback is used in the event of B/G
and L standard. This amplifier is featured with a high
bandwidth and 7 dB gain. The input impedance is adapted
for operating in combination with ceramic sound traps. The
output stage delivers a nominal 2 V (p-p) positive video
signal. Noise clipping is provided.
SIF amplifier and AGC for AM sound
The sound IF amplifier consists of two AC-coupled
differential amplifier stages. Each differential stage
comprises a controlled feedback network provided by
emitter degeneration.
The SIF AGC detector is related to the SIF input signals
(average level of AM carrier) and controls the SIF amplifier
to provide a constant SIF signal to the AM demodulator.
The SIF AGC reaction time is set to ‘slow’ for nominal
video conditions. But with a decreasing VIF amplitude step
the SIF AGC is set to ‘fast’ mode controlled by the VIF
AGC detector.
Intercarrier mixer
The intercarrier mixer is realized by a multiplier. The VIF
amplifier output signal is fed to the intercarrier mixer and
converted to intercarrier frequency by the regenerated
picture carrier (VCO). The mixer output signal is fed via a
high-pass for attenuation of the video signal components.
AM demodulator
The AM demodulator is realized by a multiplier. The
modulated SIF amplifier output signal is multiplied in
phase with the limited (AM is removed) SIF amplifier
output signal. The demodulator output signal is fed via an
integrated low-pass filter for attenuation of the carrier
harmonics to the AF amplifier.
FM detector
The FM detector consists of a limiter, an FM-PLL and an
AF amplifier. The limiter provides the amplification and
limitation of the FM sound intercarrier signal before
demodulation. The result is high sensitivity and AM
suppression. The amplifier consists of 7 stages which are
internally AC-coupled in order to minimize the DC offset
and to save pins for DC decoupling.
The FM-PLL consists of an integrated relaxation oscillator,
an integrated loop filter and a phase detector. The
oscillator is locked to the FM intercarrier signal, output
from the limiter. As a result of locking, the oscillator
frequency tracks with the modulation of the input signal
and the oscillator control voltage is superimposed by the
AF voltage. The FM-PLL operates as an FM-demodulator
The AF amplifier consists of two parts:
• The AF preamplifier for FM sound is an operational
amplifier with internal feedback, high gain and high
common mode rejection. The AF voltage from the PLL
demodulator, by principle a small output signal, is
amplified by approximately 33 dB. The low-pass
characteristic of the amplifier reduces the harmonics of
the intercarrier signal at the sound output terminal, at
which the de-emphasis network for FM sound is applied.
An additional DC control circuit is implemented to keep
the DC level constant, independent of process spread.
• The AF output amplifier (10 dB) provides the required
output level by a rail-to-rail output stage. This amplifier
makes use of an input selector for switching to AM, FM
de-emphasis or mute state, controlled by the standard
switching voltage and the mute switching voltage.
Internal voltage stabilizer and 1⁄2VP-reference
The bandgap circuit internally generates a voltage of
approximately 1.25 V, independent of supply voltage and
temperature. A voltage regulator circuit, connected to this
voltage, produces a constant voltage of 3.6 V which is
used as an internal reference voltage.
For all audio output signals the constant reference voltage
cannot be used because large output signals are required.
Therefore these signals refer to half the supply voltage to
achieve a symmetrical headroom, especially for the
rail-to-rail output stage. For ripple and noise attenuation
the 1⁄2VP voltage has to be filtered via a low-pass filter by
using an external capacitor together with an integrated
resistor (fg = 5 Hz). For a fast setting to 1⁄2VP an internal
start-up circuit is added.
1995 Mar 21
8
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