STE24NA100 데이터 시트보기 (PDF) - STMicroelectronics
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STE24NA100 Datasheet PDF : 8 Pages
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STE24NA100
ELECTRICAL CHARACTERISTICS (continued)
SWITCHING ON
Symbo l
td(on)
tr
P ar am et e r
Turn-on Time
Rise Time
Qg
Total Gate Charge
Q gs Gat e-Source Charge
Qgd Gat e-Drain Charge
Test Conditions
VDD = 500 V
ID = 12 A
RG = 4.7 Ω
VGS = 10 V
(see test circuit, figure 3)
VDD = 800 V ID = 24 A VGS = 10 V
Min.
Typ.
40
55
470
43
226
Max.
56
77
660
Unit
ns
ns
nC
nC
nC
SWITCHING OFF
Symbo l
tr (Voff)
tf
tc
P ar am et e r
Off-voltage Rise T ime
Fall Time
Cross-over Time
Test Conditions
VDD = 800 V
ID = 24 A
RG = 4.7 Ω
VGS = 10 V
(see test circuit, figure 5)
Min.
Typ.
110
25
150
Max.
154
35
210
Unit
ns
ns
ns
SOURCE DRAIN DIODE
Symbo l
ISD
ISDM (•)
VSD (∗)
trr
Qrr
I R RM
P ar am et e r
Source-drain Current
Source-drain Current
( pu ls ed)
Forward On Voltage
Reverse Recovery
Time
Reverse Recovery
Charge
Reverse Recovery
Current
Test Conditions
ISD = 24 A VGS = 0
ISD = 24 A
VDD = 100 V
di/dt = 100 A/µs
Tj = 150 oC
(see test circuit, figure 5)
(∗) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %
(•) Pulse width limited by safe operating area
Min.
Typ.
Max.
24
96
Unit
A
A
1.6
V
1.4
µs
41
µC
60
A
Safe Operating Area
Thermal Impedance
3/8
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