SC9256S 데이터 시트보기 (PDF) - Silan Microelectronics

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SC9256S

PLL FOR DTS

Silan Microelectronics 

Silan

Semiconductors

SC9256

LSB

Address D3H

MSB

0 0 0 I5 I6

Input register

I/O-5 I/O-6

Input data

INPUT PORTS

(I/O-5 ~ I/O-6)

"L" level

"H" level

BIT DATA

(I5-I6)

0

1

Note:

1. When pins I/O-5~I/O-6 are used for output, the data in I5~I6 of the output register(D3H) are undefined..

2. When power is turned on, input register (D2H) I/O port control bits M5~M6 and output data bits O5~O6 are

set to “0”. General-purpose I/O ports are set as input ports. Pins which are used both as general-purpose I/O

ports and for general-purpose counter input are set for I/O port input. The output state of general-purpose

output ports is set to high impedance (N channel open drain output =off).

3. Pin I/O-5 and I/O-6 also serve as general-purpose counter input pins. Therefore, bits IF1 and IF2 of input

register 2 must be set to “0” when these pins are used as I/O ports.

Phase comparator

The phase comparator outputs the phase error after comparing the phase difference of the reference frequency

signal supplied by the reference counter and the divided output from the programmable counter. The frequencies

and phase differences of these two signals are then equalized by passing them through low-pass filters. These

signals then control the VCO.

The filter constants can be customized for FM and AM bands since the signals are output in parallel from the

phase comparator then pass through the two tristate buffer pins, DO1 and DO2.

Reference frequency signal

Programmable

counter output

R

phase

S comparator

VDD

DO1

L.P.F

VDD

DO2

L.P.F

FM

VCO

AM

VCO

Fig.7

HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD

REV: 1.0

17

2002.01.30.

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